diff options
| author | Shaokun Zhang <[email protected]> | 2021-01-25 19:55:53 +0800 |
|---|---|---|
| committer | Will Deacon <[email protected]> | 2021-01-26 23:40:23 +0000 |
| commit | 1e193c70f5bba8fc66b9da19be64e9a9229a37d6 (patch) | |
| tree | a9238d222752c1f898e8a76f28ae4dfb1535f09b | |
| parent | 507d664450f84ab2d5601aed55c6a4b3af9ec4c2 (diff) | |
arm64: cacheflush: Remove stale comment
Remove stale comment since commit a7ba121215fa ("arm64: use asm-generic/cacheflush.h")
Cc: Christoph Hellwig <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Catalin Marinas <[email protected]>
Cc: Will Deacon <[email protected]>
Signed-off-by: Shaokun Zhang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
| -rw-r--r-- | arch/arm64/include/asm/cacheflush.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h index 45217f21f1fe..52e5c1623224 100644 --- a/arch/arm64/include/asm/cacheflush.h +++ b/arch/arm64/include/asm/cacheflush.h @@ -30,11 +30,6 @@ * the implementation assumes non-aliasing VIPT D-cache and (aliasing) * VIPT I-cache. * - * flush_cache_mm(mm) - * - * Clean and invalidate all user space cache entries - * before a change of page tables. - * * flush_icache_range(start, end) * * Ensure coherency between the I-cache and the D-cache in the |