diff options
author | Daniel Palmer <[email protected]> | 2021-02-11 14:22:00 +0900 |
---|---|---|
committer | Stephen Boyd <[email protected]> | 2021-02-14 12:37:40 -0800 |
commit | 1d895931cb427b4275f3ca4ffebe1f12c6ce2e4e (patch) | |
tree | ac86c2a6e5f22d3353f942ed93154dc685e40b8e | |
parent | 5c8fe583cce542aa0b84adc939ce85293de36e5e (diff) |
dt-bindings: clk: mstar msc313 mpll binding header
Simple header to document the relationship between the MPLL outputs
and which divider they come from.
Output 0 is missing because it should not be consumed.
Signed-off-by: Daniel Palmer <[email protected]>
Acked-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
-rw-r--r-- | MAINTAINERS | 1 | ||||
-rw-r--r-- | include/dt-bindings/clock/mstar-msc313-mpll.h | 19 |
2 files changed, 20 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 546aa66428c9..ac03c7a0066b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2150,6 +2150,7 @@ F: Documentation/devicetree/bindings/gpio/mstar,msc313-gpio.yaml F: arch/arm/boot/dts/mstar-* F: arch/arm/mach-mstar/ F: drivers/gpio/gpio-msc313.c +F: include/dt-bindings/clock/mstar-* F: include/dt-bindings/gpio/msc313-gpio.h ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT diff --git a/include/dt-bindings/clock/mstar-msc313-mpll.h b/include/dt-bindings/clock/mstar-msc313-mpll.h new file mode 100644 index 000000000000..1b30b02317b6 --- /dev/null +++ b/include/dt-bindings/clock/mstar-msc313-mpll.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +/* + * Output definitions for the MStar/SigmaStar MPLL + * + * Copyright (C) 2020 Daniel Palmer <[email protected]> + */ + +#ifndef _DT_BINDINGS_CLOCK_MSTAR_MSC313_MPLL_H +#define _DT_BINDINGS_CLOCK_MSTAR_MSC313_MPLL_H + +#define MSTAR_MSC313_MPLL_DIV2 1 +#define MSTAR_MSC313_MPLL_DIV3 2 +#define MSTAR_MSC313_MPLL_DIV4 3 +#define MSTAR_MSC313_MPLL_DIV5 4 +#define MSTAR_MSC313_MPLL_DIV6 5 +#define MSTAR_MSC313_MPLL_DIV7 6 +#define MSTAR_MSC313_MPLL_DIV10 7 + +#endif |