diff options
author | Alex Hung <[email protected]> | 2024-04-26 11:25:50 -0600 |
---|---|---|
committer | Alex Deucher <[email protected]> | 2024-05-02 16:18:18 -0400 |
commit | 1cbb91cb29a71f0a22f6909bf9c0ad43bd315bae (patch) | |
tree | fed44681acc4609f8872570d8d23152f2a891f79 | |
parent | 674704a5dabe4a434645fdd11e35437f4e06dfc4 (diff) |
drm/amd/display: Limit clock assignments by size of clk tables
[WHAT & HOW]
Check clk table's array size to avoid out-of-bound memory accesses.
This fixes two OVERRUN issues reported by Coverity.
Reviewed-by: Harry Wentland <[email protected]>
Acked-by: Tom Chung <[email protected]>
Signed-off-by: Alex Hung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c index 005092b0a0cb..7db7446ad91f 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c @@ -130,7 +130,7 @@ static void dcn401_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e c *num_levels = ret & 0xFF; /* if the initial message failed, num_levels will be 0 */ - for (i = 0; i < *num_levels; i++) { + for (i = 0; i < *num_levels && i < ARRAY_SIZE(clk_mgr->base.bw_params->clk_table.entries); i++) { *((unsigned int *)entry_i) = (dcn30_smu_get_dpm_freq_by_index(clk_mgr, clk, i) & 0xFFFF); entry_i += sizeof(clk_mgr->base.bw_params->clk_table.entries[0]); } |