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authorAndrew Davis <afd@ti.com>2023-08-09 19:38:07 -0500
committerNishanth Menon <nm@ti.com>2023-08-09 22:30:27 -0500
commit1a576c89168422b0658f7831d6e1bad63252eaea (patch)
tree51efd78de82b6ea69ecb09eba94ceaff32bb1ea0
parent73676c480b7286cb528170de73a7c03e19a5ade2 (diff)
arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level
OSPI nodes defined in the top-level J7200 SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230810003814.85450-7-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
-rw-r--r--arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi1
-rw-r--r--arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi1
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 04f39b081dc0..1cda01b6f648 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -546,6 +546,7 @@
power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index b37f4f88ece4..5a300d4c8ba0 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -267,6 +267,7 @@
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;