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authorIkjoon Jang <[email protected]>2024-02-23 17:11:21 +0800
committerAngeloGioacchino Del Regno <[email protected]>2024-04-03 10:03:38 +0200
commit1781f2c461804c0123f59afc7350e520a88edffb (patch)
treeaa344e3df8d93edbf00fac5560a5e12e9c272b34
parent4cece764965020c22cff7665b18a012006359095 (diff)
arm64: dts: mediatek: mt8183: Add power-domains properity to mfgcfg
mfgcfg clock is under MFG_ASYNC power domain. Fixes: e526c9bc11f8 ("arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile") Fixes: 37fb78b9aeb7 ("arm64: dts: mediatek: Add mt8183 power domains controller") Signed-off-by: Weiyi Lu <[email protected]> Signed-off-by: Ikjoon Jang <[email protected]> Reviewed-by: Enric Balletbo i Serra <[email protected]> Signed-off-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8183.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 93dfbf130231..774ae5d9143f 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1637,6 +1637,7 @@
compatible = "mediatek,mt8183-mfgcfg", "syscon";
reg = <0 0x13000000 0 0x1000>;
#clock-cells = <1>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>;
};
gpu: gpu@13040000 {