diff options
author | Yang Wang <[email protected]> | 2023-09-08 11:26:22 +0800 |
---|---|---|
committer | Alex Deucher <[email protected]> | 2023-09-11 17:10:42 -0400 |
commit | 174a33e470bfff743b6886e78ae042e520d4f29b (patch) | |
tree | 32b2c5fc603658362eabfe695195ce2ae91be300 | |
parent | 40a08fe890640f9c61d4443c218b61f745b11b2d (diff) |
drm/amd/pm: update smu_v13_0_6 smu header
update smu firmware header to support smu mca debug feature.
Signed-off-by: Yang Wang <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r-- | drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_6.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h | 3 |
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_6.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_6.h index ca4a5e99ccd1..d0833887c355 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_6.h +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_6.h @@ -132,6 +132,9 @@ typedef struct { #define THROTTLER_THERMAL_VR_BIT 3//VRHOT #define THROTTLER_THERMAL_HBM_BIT 4 +#define ClearMcaOnRead_UE_FLAG_MASK 0x1 +#define ClearMcaOnRead_CE_POLL_MASK 0x2 + // These defines are used with the following messages: // SMC_MSG_TransferTableDram2Smu // SMC_MSG_TransferTableSmu2Dram diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h index 70a4a717fd3f..4ac4f2dcc203 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h @@ -87,7 +87,8 @@ #define PPSMC_MSG_QueryValidMcaCount 0x36 #define PPSMC_MSG_McaBankDumpDW 0x37 #define PPSMC_MSG_GetCTFLimit 0x38 -#define PPSMC_Message_Count 0x39 +#define PPSMC_MSG_ClearMcaOnRead 0x39 +#define PPSMC_Message_Count 0x40 //PPSMC Reset Types for driver msg argument #define PPSMC_RESET_TYPE_DRIVER_MODE_1_RESET 0x1 |