diff options
| author | Ravishankar Karkala Mallikarjunayya <[email protected]> | 2016-05-18 10:27:29 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2016-06-17 20:55:43 -0700 |
| commit | 1694830640d4573e8535dd6798b6f4cf00f680fd (patch) | |
| tree | 31544602024a6f65109d64dc3adb827895272a84 | |
| parent | 9c84ae6b69d29f5f2b2aeb12d701034a20584a7c (diff) | |
Staging: comedi: fix CHECK: Prefer using the BIT macro issues in pcmmio.c
This patch Replace all occurences of (1<<x) by BIT(x) in the file pcmmio.c to
get rid of checkpatch.pl "CHECK" output "Prefer using the BIT macro"
Signed-off-by: Ravishankar Karkala Mallikarjunayya <[email protected]>
Reviewed-by: Ian Abbott <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
| -rw-r--r-- | drivers/staging/comedi/drivers/pcmmio.c | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/staging/comedi/drivers/pcmmio.c b/drivers/staging/comedi/drivers/pcmmio.c index 10472e6dd002..70ad497dd20b 100644 --- a/drivers/staging/comedi/drivers/pcmmio.c +++ b/drivers/staging/comedi/drivers/pcmmio.c @@ -84,25 +84,25 @@ #define PCMMIO_AI_LSB_REG 0x00 #define PCMMIO_AI_MSB_REG 0x01 #define PCMMIO_AI_CMD_REG 0x02 -#define PCMMIO_AI_CMD_SE (1 << 7) -#define PCMMIO_AI_CMD_ODD_CHAN (1 << 6) +#define PCMMIO_AI_CMD_SE BIT(7) +#define PCMMIO_AI_CMD_ODD_CHAN BIT(6) #define PCMMIO_AI_CMD_CHAN_SEL(x) (((x) & 0x3) << 4) #define PCMMIO_AI_CMD_RANGE(x) (((x) & 0x3) << 2) #define PCMMIO_RESOURCE_REG 0x02 #define PCMMIO_RESOURCE_IRQ(x) (((x) & 0xf) << 0) #define PCMMIO_AI_STATUS_REG 0x03 -#define PCMMIO_AI_STATUS_DATA_READY (1 << 7) -#define PCMMIO_AI_STATUS_DATA_DMA_PEND (1 << 6) -#define PCMMIO_AI_STATUS_CMD_DMA_PEND (1 << 5) -#define PCMMIO_AI_STATUS_IRQ_PEND (1 << 4) -#define PCMMIO_AI_STATUS_DATA_DRQ_ENA (1 << 2) -#define PCMMIO_AI_STATUS_REG_SEL (1 << 3) -#define PCMMIO_AI_STATUS_CMD_DRQ_ENA (1 << 1) -#define PCMMIO_AI_STATUS_IRQ_ENA (1 << 0) +#define PCMMIO_AI_STATUS_DATA_READY BIT(7) +#define PCMMIO_AI_STATUS_DATA_DMA_PEND BIT(6) +#define PCMMIO_AI_STATUS_CMD_DMA_PEND BIT(5) +#define PCMMIO_AI_STATUS_IRQ_PEND BIT(4) +#define PCMMIO_AI_STATUS_DATA_DRQ_ENA BIT(2) +#define PCMMIO_AI_STATUS_REG_SEL BIT(3) +#define PCMMIO_AI_STATUS_CMD_DRQ_ENA BIT(1) +#define PCMMIO_AI_STATUS_IRQ_ENA BIT(0) #define PCMMIO_AI_RES_ENA_REG 0x03 #define PCMMIO_AI_RES_ENA_CMD_REG_ACCESS (0 << 3) -#define PCMMIO_AI_RES_ENA_AI_RES_ACCESS (1 << 3) -#define PCMMIO_AI_RES_ENA_DIO_RES_ACCESS (1 << 4) +#define PCMMIO_AI_RES_ENA_AI_RES_ACCESS BIT(3) +#define PCMMIO_AI_RES_ENA_DIO_RES_ACCESS BIT(4) #define PCMMIO_AI_2ND_ADC_OFFSET 0x04 #define PCMMIO_AO_LSB_REG 0x08 @@ -125,14 +125,14 @@ #define PCMMIO_AO_CMD_CHAN_SEL(x) (((x) & 0x03) << 1) #define PCMMIO_AO_CMD_CHAN_SEL_ALL (0x0f << 0) #define PCMMIO_AO_STATUS_REG 0x0b -#define PCMMIO_AO_STATUS_DATA_READY (1 << 7) -#define PCMMIO_AO_STATUS_DATA_DMA_PEND (1 << 6) -#define PCMMIO_AO_STATUS_CMD_DMA_PEND (1 << 5) -#define PCMMIO_AO_STATUS_IRQ_PEND (1 << 4) -#define PCMMIO_AO_STATUS_DATA_DRQ_ENA (1 << 2) -#define PCMMIO_AO_STATUS_REG_SEL (1 << 3) -#define PCMMIO_AO_STATUS_CMD_DRQ_ENA (1 << 1) -#define PCMMIO_AO_STATUS_IRQ_ENA (1 << 0) +#define PCMMIO_AO_STATUS_DATA_READY BIT(7) +#define PCMMIO_AO_STATUS_DATA_DMA_PEND BIT(6) +#define PCMMIO_AO_STATUS_CMD_DMA_PEND BIT(5) +#define PCMMIO_AO_STATUS_IRQ_PEND BIT(4) +#define PCMMIO_AO_STATUS_DATA_DRQ_ENA BIT(2) +#define PCMMIO_AO_STATUS_REG_SEL BIT(3) +#define PCMMIO_AO_STATUS_CMD_DRQ_ENA BIT(1) +#define PCMMIO_AO_STATUS_IRQ_ENA BIT(0) #define PCMMIO_AO_RESOURCE_ENA_REG 0x0b #define PCMMIO_AO_2ND_DAC_OFFSET 0x04 |