diff options
author | Chris Wilson <[email protected]> | 2019-03-06 08:24:47 +0000 |
---|---|---|
committer | Chris Wilson <[email protected]> | 2019-03-06 11:08:32 +0000 |
commit | 161996a8003faa22baaac9f379ef580af551d26f (patch) | |
tree | bdc60c4df2940b401a5161f5d0dbb8c8fca4ec24 | |
parent | b146e5efe660e03eee2b2c4a2e02410d9a8824ec (diff) |
drm/i915/selftests: Fix MI_STORE_DWORD_IMM alignment
MI_STORE_DWORD_IMM wants to write into a dword-aligned (4B) address, we
mistakenly cleared bit2 and not bits 0 and 1.
Signed-off-by: Chris Wilson <[email protected]>
Cc: Matthew Auld <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Reviewed-by: Matthew Auld <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
-rw-r--r-- | drivers/gpu/drm/i915/selftests/i915_gem_context.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/selftests/i915_gem_context.c index 30111c004eb6..0346ff224d5d 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c @@ -1433,7 +1433,7 @@ static int igt_vm_isolation(void *arg) div64_u64_rem(i915_prandom_u64_state(&prng), vm_total, &offset); - offset &= ~sizeof(u32); + offset &= -sizeof(u32); offset += I915_GTT_PAGE_SIZE; err = write_to_scratch(ctx_a, engine, |