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authorChris Wilson <[email protected]>2019-10-28 12:18:03 +0000
committerChris Wilson <[email protected]>2019-10-28 16:09:43 +0000
commit13670f4ce9169ddc6793e243635f8400e74bbbf7 (patch)
treec60c6ef9a3f3e3a548ec65c45dd00dc2da75e97e
parente5df52dcf88cb9e900d6409da035a3c419e242cb (diff)
drm/i915/selftests: Check a few more fixed locations within the context image
As we use hard coded offsets for a few locations within the context image, include those in the selftests to assert that they are valid. Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
-rw-r--r--drivers/gpu/drm/i915/gt/selftest_lrc.c27
1 files changed, 26 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index ba7fc4397bd9..9507d750ae14 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -3195,9 +3195,34 @@ static int live_lrc_fixed(void *arg)
const char *name;
} tbl[] = {
{
+ i915_mmio_reg_offset(RING_START(engine->mmio_base)),
+ CTX_RING_BUFFER_START - 1,
+ "RING_START"
+ },
+ {
+ i915_mmio_reg_offset(RING_CTL(engine->mmio_base)),
+ CTX_RING_BUFFER_CONTROL - 1,
+ "RING_CTL"
+ },
+ {
+ i915_mmio_reg_offset(RING_HEAD(engine->mmio_base)),
+ CTX_RING_HEAD - 1,
+ "RING_HEAD"
+ },
+ {
+ i915_mmio_reg_offset(RING_TAIL(engine->mmio_base)),
+ CTX_RING_TAIL - 1,
+ "RING_TAIL"
+ },
+ {
i915_mmio_reg_offset(RING_MI_MODE(engine->mmio_base)),
lrc_ring_mi_mode(engine),
- "RING_MI_MODE",
+ "RING_MI_MODE"
+ },
+ {
+ engine->mmio_base + 0x110,
+ CTX_BB_STATE - 1,
+ "BB_STATE"
},
{ },
}, *t;