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authorVince Weaver <[email protected]>2010-04-06 10:01:19 -0400
committerIngo Molnar <[email protected]>2010-04-06 17:52:59 +0200
commit134fbadf028a5977a1b06b0253d3ee33e6f0c642 (patch)
tree69c37ffab15aeef5f97100fc370c6ef685a940c2
parent8c40041f75a202ed6a3b38143b823cb80f6d6b7c (diff)
perf, x86: Enable Nehalem-EX support
According to Intel Software Devel Manual Volume 3B, the Nehalem-EX PMU is just like regular Nehalem (except for the uncore support, which is completely different). Signed-off-by: Vince Weaver <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Paul Mackerras <[email protected]> Cc: Arnaldo Carvalho de Melo <[email protected]> Cc: "H. Peter Anvin" <[email protected]> Cc: Arjan van de Ven <[email protected]> Cc: Lin Ming <[email protected]> LKML-Reference: <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 84bfde64a337..9c794ac87837 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -936,6 +936,7 @@ static __init int intel_pmu_init(void)
case 26: /* 45 nm nehalem, "Bloomfield" */
case 30: /* 45 nm nehalem, "Lynnfield" */
+ case 46: /* 45 nm nehalem-ex, "Beckton" */
memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
sizeof(hw_cache_event_ids));