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authorVille Syrjälä <[email protected]>2023-05-02 17:38:59 +0300
committerVille Syrjälä <[email protected]>2023-09-13 16:37:40 +0300
commit126f94e87e7960ef7ae58180e39c19cc9dcbbf7f (patch)
tree2cb63c33d6e66fedf93454a75d2beb63205a104e
parentcbbfe9150857253216e519d85d7b4ff2b56558c2 (diff)
drm/i915: Fix FEC pipe A vs. DDI A mixup
On pre-TGL FEC is a port level feature, not a transcoder level feature, and it's DDI A which doesn't have it, not trancoder A. Check for the correct thing when determining whether FEC is supported or not. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Luca Coelho <[email protected]>
-rw-r--r--drivers/gpu/drm/i915/display/intel_dp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index aa5f602b56fb..781cffeda8f0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1357,13 +1357,13 @@ bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp)
static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
const struct intel_crtc_state *pipe_config)
{
+ struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- /* On TGL, FEC is supported on all Pipes */
if (DISPLAY_VER(dev_priv) >= 12)
return true;
- if (DISPLAY_VER(dev_priv) == 11 && pipe_config->cpu_transcoder != TRANSCODER_A)
+ if (DISPLAY_VER(dev_priv) == 11 && encoder->port != PORT_A)
return true;
return false;