diff options
author | Marek Szyprowski <[email protected]> | 2019-06-14 08:52:53 +0200 |
---|---|---|
committer | Felipe Balbi <[email protected]> | 2019-06-18 11:58:28 +0300 |
commit | 1112cf4c4109473fd8a30a4678d25f9321ef5d67 (patch) | |
tree | 3ebc727d082e2d9fa48fb46b31a8e923743f5fbd | |
parent | f90db10779adab4b2bb12dd5de661616b6fda9e3 (diff) |
usb: dwc2: Force 8bit UTMI width for Samsung Exynos SoCs
Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the
host side of the shared USB2 PHY doesn't work.
Reported-by: Krzysztof Kozlowski <[email protected]>
Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
Signed-off-by: Marek Szyprowski <[email protected]>
Acked-by: Minas Harutyunyan <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Felipe Balbi <[email protected]>
-rw-r--r-- | drivers/usb/dwc2/params.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index 6900eea57526..9ece4affb9d4 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -76,6 +76,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg) struct dwc2_core_params *p = &hsotg->params; p->power_down = 0; + p->phy_utmi_width = 8; } static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) |