diff options
| author | Bartosz Golaszewski <[email protected]> | 2023-03-09 15:35:50 +0100 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-03-13 12:11:27 -0700 |
| commit | 10d900a834da29cf753f1e45f66982e322a177c1 (patch) | |
| tree | 575b4c91803438570f0707bea8eb6fe97d241995 | |
| parent | fe15c26ee26efa11741a7b632e9f23b01aca4cc6 (diff) | |
arm64: dts: sm8150: add the QUPv3 high-speed UART node
Add the high-speed UART node to the dtsi for sm8150.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8150.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e..bfa19414c4be 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1334,6 +1334,20 @@ status = "disabled"; }; + uart9: serial@a8c000 { + compatible = "qcom,geni-uart"; + reg = <0x0 0x00a84000 0x0 0x4000>; + reg-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; + clock-names = "se"; + pinctrl-0 = <&qup_uart9_default>; + pinctrl-names = "default"; + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + i2c10: i2c@a88000 { compatible = "qcom,geni-i2c"; reg = <0 0x00a88000 0 0x4000>; @@ -2425,6 +2439,13 @@ bias-disable; }; + qup_uart9_default: qup-uart9-default-state { + pins = "gpio41", "gpio42"; + function = "qup9"; + drive-strength = <2>; + bias-disable; + }; + qup_i2c10_default: qup-i2c10-default-state { pins = "gpio9", "gpio10"; function = "qup10"; |