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authorConnor Abbott <[email protected]>2024-04-26 19:33:59 +0100
committerBjorn Andersson <[email protected]>2024-04-29 12:35:42 -0500
commit0d80ac75cba26fde5cae55323b7617f0fec5322b (patch)
treef6273657149008620ee64abdd3db48ab3d911a13
parent873d845a357a4d89700cb1bb5b3da68890756f50 (diff)
arm64: dts: qcom: sm8650: Fix GPU cx_mem size
This is doubled compared to previous GPUs. We can't access the new SW_FUSE_VALUE register without this. Fixes: db33633b05c0 ("arm64: dts: qcom: sm8650: add GPU nodes") Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
-rw-r--r--arch/arm64/boot/dts/qcom/sm8650.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 434ad2f12332..745d40adb7fa 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -2614,7 +2614,7 @@
gpu: gpu@3d00000 {
compatible = "qcom,adreno-43051401", "qcom,adreno";
reg = <0x0 0x03d00000 0x0 0x40000>,
- <0x0 0x03d9e000 0x0 0x1000>,
+ <0x0 0x03d9e000 0x0 0x2000>,
<0x0 0x03d61000 0x0 0x800>;
reg-names = "kgsl_3d0_reg_memory",
"cx_mem",