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authorAlex Bee <[email protected]>2023-11-27 19:46:44 +0100
committerHeiko Stuebner <[email protected]>2023-11-28 10:57:51 +0100
commit0c349b5001f8bdcead844484c15a0c4dfb341157 (patch)
tree01e83fd98c9277419f78391bc5e36883b4468eb8
parent93dc6cd15f207be502739072ad122fa5ac812908 (diff)
ARM: dts: rockchip: Fix sdmmc_pwren's pinmux setting for RK3128
RK3128's reference design uses sdmmc_pwren pincontrol as GPIO - see [0]. Let's change it in the SoC DT as well. [0] https://github.com/rockchip-linux/kernel/commit/8c62deaf6025 Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi") Signed-off-by: Alex Bee <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
-rw-r--r--arch/arm/boot/dts/rockchip/rk3128.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index 7bf557c99561..01edf244ddee 100644
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -848,7 +848,7 @@
};
sdmmc_pwren: sdmmc-pwren {
- rockchip,pins = <1 RK_PB6 1 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_default>;
};
sdmmc_bus4: sdmmc-bus4 {