diff options
| author | Lijo Lazar <[email protected]> | 2022-07-29 14:56:59 +0530 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2023-06-09 09:46:12 -0400 |
| commit | 0b02364e03caecbe30bdd9db0b3e6ba0196bb0ef (patch) | |
| tree | fe693b2f844e0c3868bc38b67758895fb526f496 | |
| parent | 762702ebd324596def832a2b2a1cfd24fff78338 (diff) | |
drm/amdgpu: Conform to SET_UCONFIG_REG spec
The packet expects only 16 bits register offset. Hence pass register
offset which is local to each XCC.
Signed-off-by: Lijo Lazar <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index 43126f7b70ea..14b96b43f02c 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -232,13 +232,14 @@ static void gfx_v9_4_3_wait_reg_mem(struct amdgpu_ring *ring, int eng_sel, static int gfx_v9_4_3_ring_test_ring(struct amdgpu_ring *ring) { + uint32_t scratch_reg0_offset, xcc_offset; struct amdgpu_device *adev = ring->adev; uint32_t tmp = 0; unsigned i; int r; - /* scratch_reg0_offset is 32bit even with full XCD config */ - uint32_t scratch_reg0_offset; + /* Use register offset which is local to XCC in the packet */ + xcc_offset = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0); scratch_reg0_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, ring->xcc_id), regSCRATCH_REG0); WREG32(scratch_reg0_offset, 0xCAFEDEAD); @@ -247,7 +248,7 @@ static int gfx_v9_4_3_ring_test_ring(struct amdgpu_ring *ring) return r; amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); - amdgpu_ring_write(ring, scratch_reg0_offset - PACKET3_SET_UCONFIG_REG_START); + amdgpu_ring_write(ring, xcc_offset - PACKET3_SET_UCONFIG_REG_START); amdgpu_ring_write(ring, 0xDEADBEEF); amdgpu_ring_commit(ring); |