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authorKevin Wang <[email protected]>2019-04-23 14:16:52 +0800
committerAlex Deucher <[email protected]>2019-06-21 18:59:29 -0500
commit0a6430da0c7c6603aeb99b5b91418e6665c77561 (patch)
tree0f76b70457f7dddedd94910cdfdb028862e72895
parent284305445fee2384114aac12e77966120d1c9c96 (diff)
drm/amd/powerplay: add function display_configuration_changed for navi10
1.add callback function to support navi10 asic. 2.Remove unnecessary logical code. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r--drivers/gpu/drm/amd/powerplay/navi10_ppt.c25
-rw-r--r--drivers/gpu/drm/amd/powerplay/smu_v11_0.c16
-rw-r--r--drivers/gpu/drm/amd/powerplay/vega20_ppt.c10
3 files changed, 40 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 50bdbb7c2908..bcd2adca6ed7 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -671,6 +671,30 @@ static int navi10_pre_display_config_changed(struct smu_context *smu)
return ret;
}
+static int navi10_display_config_changed(struct smu_context *smu)
+{
+ int ret = 0;
+
+ if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
+ !(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
+ ret = smu_write_watermarks_table(smu);
+ if (ret)
+ return ret;
+
+ smu->watermarks_bitmap |= WATERMARKS_LOADED;
+ }
+
+ if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
+ smu_feature_is_supported(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) &&
+ smu_feature_is_supported(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
+ ret = smu_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays,
+ smu->display_config->num_display);
+ if (ret)
+ return ret;
+ }
+
+ return ret;
+}
static const struct pptable_funcs navi10_ppt_funcs = {
.tables_init = navi10_tables_init,
.alloc_dpm_context = navi10_allocate_dpm_context,
@@ -691,6 +715,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
.populate_umd_state_clk = navi10_populate_umd_state_clk,
.get_clock_by_type_with_latency = navi10_get_clock_by_type_with_latency,
.pre_display_config_changed = navi10_pre_display_config_changed,
+ .display_config_changed = navi10_display_config_changed,
};
void navi10_set_ppt_funcs(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index b0b8aeebe2ba..ec7862ea299d 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -714,9 +714,21 @@ static int smu_v11_0_write_pptable(struct smu_context *smu)
static int smu_v11_0_write_watermarks_table(struct smu_context *smu)
{
- return smu_update_table(smu, SMU_TABLE_WATERMARKS,
- smu->smu_table.tables[SMU_TABLE_WATERMARKS].cpu_addr,
+ int ret = 0;
+ struct smu_table_context *smu_table = &smu->smu_table;
+ struct smu_table *table = NULL;
+
+ table = &smu_table->tables[SMU_TABLE_WATERMARKS];
+ if (!table)
+ return -EINVAL;
+
+ if (!table->cpu_addr)
+ return -EINVAL;
+
+ ret = smu_update_table(smu, SMU_TABLE_WATERMARKS, table->cpu_addr,
true);
+
+ return ret;
}
static int smu_v11_0_set_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk)
diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
index aea14f1a6395..63697fd3445f 100644
--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
@@ -1992,17 +1992,9 @@ static int vega20_display_config_changed(struct smu_context *smu)
{
int ret = 0;
- if (!smu->funcs)
- return -EINVAL;
-
- if (!smu->smu_dpm.dpm_context ||
- !smu->smu_table.tables ||
- !smu->smu_table.tables[TABLE_WATERMARKS].cpu_addr)
- return -EINVAL;
-
if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
!(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
- ret = smu->funcs->write_watermarks_table(smu);
+ ret = smu_write_watermarks_table(smu);
if (ret) {
pr_err("Failed to update WMTABLE!");
return ret;