diff options
| author | Dave Jiang <[email protected]> | 2016-12-13 09:03:13 -0700 |
|---|---|---|
| committer | Jon Mason <[email protected]> | 2016-12-23 16:10:54 -0500 |
| commit | 09e71a6f13445974fe9b70b6d4b68ac362cd68b6 (patch) | |
| tree | dbfc1fc833d55b8b4ed612ef762c6c338507ebc9 | |
| parent | 5c43c52d5fb6163120ae5d9a281c3b757ca6119c (diff) | |
ntb: fix SKX NTB config space size register offsets
The offsets for the SZ registers are wrong. Updated.
Signed-off-by: Dave Jiang <[email protected]>
Reported-by: Sandeep Mann <[email protected]>
Tested-by: Zachary Ross <[email protected]>
Signed-off-by: Jon Mason <[email protected]>
| -rw-r--r-- | drivers/ntb/hw/intel/ntb_hw_intel.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/ntb/hw/intel/ntb_hw_intel.h b/drivers/ntb/hw/intel/ntb_hw_intel.h index 6e8c1824eb19..f2cf8a783f1e 100644 --- a/drivers/ntb/hw/intel/ntb_hw_intel.h +++ b/drivers/ntb/hw/intel/ntb_hw_intel.h @@ -152,10 +152,10 @@ #define XEON_SPAD_COUNT 16 /* Intel Skylake Xeon hardware */ -#define SKX_IMBAR1SZ_OFFSET 0x00d1 -#define SKX_IMBAR2SZ_OFFSET 0x00d5 -#define SKX_EMBAR1SZ_OFFSET 0x00d3 -#define SKX_EMBAR2SZ_OFFSET 0x00d6 +#define SKX_IMBAR1SZ_OFFSET 0x00d0 +#define SKX_IMBAR2SZ_OFFSET 0x00d1 +#define SKX_EMBAR1SZ_OFFSET 0x00d2 +#define SKX_EMBAR2SZ_OFFSET 0x00d3 #define SKX_DEVCTRL_OFFSET 0x0098 #define SKX_DEVSTS_OFFSET 0x009a #define SKX_UNCERRSTS_OFFSET 0x014c |