diff options
| author | Rafał Miłecki <[email protected]> | 2024-02-13 14:00:44 +0100 |
|---|---|---|
| committer | AngeloGioacchino Del Regno <[email protected]> | 2024-06-27 10:10:19 +0200 |
| commit | 09346afaba0a89652da38966293ad321e2170a90 (patch) | |
| tree | c77c242757703ad6daaa2f4a3741964304c85e2d | |
| parent | b376befe9c8897780dc7a92fca76f79b5053f8a1 (diff) | |
arm64: dts: mediatek: mt7988: add XHCI controllers
Add bindings of two on-SoC XHCI controllers.
Signed-off-by: Rafał Miłecki <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi index bba97de4fb44..3eb5396dea22 100644 --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only OR MIT +#include <dt-bindings/clock/mediatek,mt7988-clk.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/phy/phy.h> / { compatible = "mediatek,mt7988a"; @@ -78,7 +80,7 @@ #interrupt-cells = <3>; }; - clock-controller@10001000 { + infracfg: clock-controller@10001000 { compatible = "mediatek,mt7988-infracfg", "syscon"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; @@ -103,6 +105,34 @@ #clock-cells = <1>; }; + usb@11190000 { + compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci"; + reg = <0 0x11190000 0 0x2e00>, + <0 0x11193e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&infracfg CLK_INFRA_USB_SYS>, + <&infracfg CLK_INFRA_USB_REF>, + <&infracfg CLK_INFRA_66M_USB_HCK>, + <&infracfg CLK_INFRA_133M_USB_HCK>, + <&infracfg CLK_INFRA_USB_XHCI>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; + }; + + usb@11200000 { + compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci"; + reg = <0 0x11200000 0 0x2e00>, + <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>, + <&infracfg CLK_INFRA_USB_CK_P1>, + <&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>, + <&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>, + <&infracfg CLK_INFRA_USB_XHCI_CK_P1>; + clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; + }; + clock-controller@11f40000 { compatible = "mediatek,mt7988-xfi-pll"; reg = <0 0x11f40000 0 0x1000>; |