diff options
| author | Jiri Olsa <[email protected]> | 2016-01-20 12:56:33 +0100 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <[email protected]> | 2016-01-26 11:14:55 -0300 |
| commit | 0805909f59e02036a4e2660159f27dbf8b6084ac (patch) | |
| tree | 31ac266735e28cc5d9736a55859c120036a5acf3 | |
| parent | d4913cbd05bab685e49c8174896e563b2487d054 (diff) | |
perf hists: Fix HISTC_MEM_DCACHELINE width setting
Set correct width for unresolved mem_dcacheline addr.
Signed-off-by: Jiri Olsa <[email protected]>
Cc: David Ahern <[email protected]>
Cc: Don Zickus <[email protected]>
Cc: Namhyung Kim <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Fixes: 9b32ba71ba90 ("perf tools: Add dcacheline sort")
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
| -rw-r--r-- | tools/perf/util/hist.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c index c226303e3da0..68a7612019dc 100644 --- a/tools/perf/util/hist.c +++ b/tools/perf/util/hist.c @@ -131,6 +131,8 @@ void hists__calc_col_len(struct hists *hists, struct hist_entry *h) symlen = unresolved_col_width + 4 + 2; hists__new_col_len(hists, HISTC_MEM_DADDR_SYMBOL, symlen); + hists__new_col_len(hists, HISTC_MEM_DCACHELINE, + symlen); } if (h->mem_info->iaddr.sym) { |