diff options
| author | H Hartley Sweeten <[email protected]> | 2014-11-11 16:55:43 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2014-11-26 15:33:25 -0800 |
| commit | 06d0ac3664cb92045d48220d7eef9da6ab6c1671 (patch) | |
| tree | b145140c03b75347bb99f42ea292c86a4069b266 | |
| parent | bbf0a305fe861ffc7628a12d6c0ccda8b8d0d163 (diff) | |
staging: comedi: dmm32at: rename DMM32AT_AICONF
For aesthetics, rename this define used for the Analog Configuration register.
Define the bits of the register.
Signed-off-by: H Hartley Sweeten <[email protected]>
Reviewed-by: Ian Abbott <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
| -rw-r--r-- | drivers/staging/comedi/drivers/dmm32at.c | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/drivers/staging/comedi/drivers/dmm32at.c b/drivers/staging/comedi/drivers/dmm32at.c index b2da8193a383..ff88810c622d 100644 --- a/drivers/staging/comedi/drivers/dmm32at.c +++ b/drivers/staging/comedi/drivers/dmm32at.c @@ -99,8 +99,15 @@ Configuration Options: #define DMM32AT_CTRDIO_CFG_GT0EN (1 << 2) /* J3.47 1=DIN1 is GATE0 */ #define DMM32AT_CTRDIO_CFG_SRC0 (1 << 1) /* CLK0 is 0=FREQ0 1=J3.48 */ #define DMM32AT_CTRDIO_CFG_GT12EN (1 << 0) /* J3.46 1=DIN2 is GATE12 */ +#define DMM32AT_AI_CFG_REG 0x0b +#define DMM32AT_AI_CFG_SCINT_20US (0 << 4) +#define DMM32AT_AI_CFG_SCINT_15US (1 << 4) +#define DMM32AT_AI_CFG_SCINT_10US (2 << 4) +#define DMM32AT_AI_CFG_SCINT_5US (3 << 4) +#define DMM32AT_AI_CFG_RANGE (1 << 3) /* 0=5V 1=10V */ +#define DMM32AT_AI_CFG_ADBU (1 << 2) /* 0=bipolar 1=unipolar */ +#define DMM32AT_AI_CFG_GAIN(x) ((x) << 0) -#define DMM32AT_AICONF 0x0b #define DMM32AT_AIRBACK 0x0b #define DMM32AT_CLK1 0x0d @@ -111,15 +118,11 @@ Configuration Options: /* Board register values. */ -/* DMM32AT_AICONF 0x0b */ +/* DMM32AT_AI_CFG_REG 0x0b */ #define DMM32AT_RANGE_U10 0x0c #define DMM32AT_RANGE_U5 0x0d #define DMM32AT_RANGE_B10 0x08 #define DMM32AT_RANGE_B5 0x00 -#define DMM32AT_SCINT_20 0x00 -#define DMM32AT_SCINT_15 0x10 -#define DMM32AT_SCINT_10 0x20 -#define DMM32AT_SCINT_5 0x30 /* DMM32AT_CLKCT 0x0f */ #define DMM32AT_CLKCT1 0x56 /* mode3 counter 1 - write low byte only */ @@ -171,7 +174,7 @@ static void dmm32at_ai_set_chanspec(struct comedi_device *dev, outb(chan, dev->iobase + DMM32AT_AI_LO_CHAN_REG); outb(last_chan, dev->iobase + DMM32AT_AI_HI_CHAN_REG); - outb(dmm32at_rangebits[range], dev->iobase + DMM32AT_AICONF); + outb(dmm32at_rangebits[range], dev->iobase + DMM32AT_AI_CFG_REG); } static unsigned int dmm32at_ai_get_sample(struct comedi_device *dev, @@ -511,7 +514,7 @@ static int dmm32at_reset(struct comedi_device *dev) outb(0xff, dev->iobase + DMM32AT_AI_HI_CHAN_REG); /* set the range at 10v unipolar */ - outb(DMM32AT_RANGE_U10, dev->iobase + DMM32AT_AICONF); + outb(DMM32AT_RANGE_U10, dev->iobase + DMM32AT_AI_CFG_REG); /* should take 10 us to settle, here's a hundred */ udelay(100); |