diff options
| author | Jeeja KP <[email protected]> | 2015-11-23 22:26:26 +0530 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2015-11-25 17:55:41 +0000 |
| commit | 06b23d9379d4cd034b7a5edad323ea9419ab2016 (patch) | |
| tree | 3bf3c1af3d28f286a0610122b9662d8d41bd8ed6 | |
| parent | 98256f83d2895fda3e596824797762937ab79f6b (diff) | |
ASoC: Intel: Skylake: Update pcm capability
This patch adds pcm capability to support 16/8k rates and 32 bit formats
Signed-off-by: Jeeja KP <[email protected]>
Signed-off-by: Vinod Koul <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
| -rw-r--r-- | sound/soc/intel/skylake/skl-pcm.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c index 3c891d78ba58..c79bbff00cb7 100644 --- a/sound/soc/intel/skylake/skl-pcm.c +++ b/sound/soc/intel/skylake/skl-pcm.c @@ -39,9 +39,12 @@ static struct snd_pcm_hardware azx_pcm_hw = { SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */ SNDRV_PCM_INFO_HAS_LINK_ATIME | SNDRV_PCM_INFO_NO_PERIOD_WAKEUP), - .formats = SNDRV_PCM_FMTBIT_S16_LE, - .rates = SNDRV_PCM_RATE_48000, - .rate_min = 48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE | + SNDRV_PCM_FMTBIT_S24_LE, + .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_8000, + .rate_min = 8000, .rate_max = 48000, .channels_min = 2, .channels_max = 2, |