diff options
author | Kan Liang <[email protected]> | 2021-06-30 14:08:30 -0700 |
---|---|---|
committer | Peter Zijlstra <[email protected]> | 2021-07-02 15:58:38 +0200 |
commit | 0654dfdc7e1ca30d36810ab694712da3de18440c (patch) | |
tree | 302b19c2fb14fc02f62458943838705a29c229e8 | |
parent | f85ef898f8842b2a9a8f51a64eaf45ee2a8bb1f7 (diff) |
perf/x86/intel/uncore: Add Sapphire Rapids server PCU support
The PCU is the primary power controller for the Sapphire Rapids.
Except the name, all the information can be retrieved from the discovery
tables.
Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Reviewed-by: Andi Kleen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
-rw-r--r-- | arch/x86/events/intel/uncore_snbep.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index 890a98279fca..913cd7aca65d 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -5633,6 +5633,10 @@ static struct intel_uncore_type spr_uncore_m2pcie = { .name = "m2pcie", }; +static struct intel_uncore_type spr_uncore_pcu = { + .name = "pcu", +}; + #define UNCORE_SPR_NUM_UNCORE_TYPES 12 static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = { @@ -5640,7 +5644,7 @@ static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = { &spr_uncore_iio, &spr_uncore_irp, &spr_uncore_m2pcie, - NULL, + &spr_uncore_pcu, NULL, NULL, NULL, |