diff options
| author | Philipp Hortmann <[email protected]> | 2023-01-29 15:58:30 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2023-01-31 11:16:34 +0100 |
| commit | 04f11af2f0567a08f331a53249065f7a193b0347 (patch) | |
| tree | b54bb89f84cb8c1d67a5d04a3a240cc728f933c4 | |
| parent | 997ee23ba610ac23117a3d1b5ee622a1bbf1cf72 (diff) | |
staging: rtl8192e: Rename BaseBand_Config_PHY_REG and BaseBand_Config_AGC_TAB
Rename constants BaseBand_Config_PHY_REG to BB_CONFIG_PHY_REG and
BaseBand_Config_AGC_TAB to BB_CONFIG_AGC_TAB to avoid CamelCase which is
not accepted by checkpatch.
Signed-off-by: Philipp Hortmann <[email protected]>
Link: https://lore.kernel.org/r/6d26690c7c2c68cc7c766c981293bd8e40999ed0.1675003608.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <[email protected]>
| -rw-r--r-- | drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h | 4 | ||||
| -rw-r--r-- | drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h index 3e223151d4b7..858cfc203f13 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h @@ -8,8 +8,8 @@ #define R8180_HW enum baseband_config { - BaseBand_Config_PHY_REG = 0, - BaseBand_Config_AGC_TAB = 1, + BB_CONFIG_PHY_REG = 0, + BB_CONFIG_AGC_TAB = 1, }; #define RTL8187_REQT_READ 0xc0 diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c index 456b7ca73073..cbda027656dc 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c @@ -342,13 +342,13 @@ static void _rtl92e_phy_config_bb(struct net_device *dev, u8 ConfigType) Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArray; } - if (ConfigType == BaseBand_Config_PHY_REG) { + if (ConfigType == BB_CONFIG_PHY_REG) { for (i = 0; i < PHY_REGArrayLen; i += 2) { rtl92e_set_bb_reg(dev, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]); } - } else if (ConfigType == BaseBand_Config_AGC_TAB) { + } else if (ConfigType == BB_CONFIG_AGC_TAB) { for (i = 0; i < AGCTAB_ArrayLen; i += 2) { rtl92e_set_bb_reg(dev, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, @@ -526,12 +526,12 @@ static bool _rtl92e_bb_config_para_file(struct net_device *dev) return rtStatus; } rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0); - _rtl92e_phy_config_bb(dev, BaseBand_Config_PHY_REG); + _rtl92e_phy_config_bb(dev, BB_CONFIG_PHY_REG); dwRegValue = rtl92e_readl(dev, CPU_GEN); rtl92e_writel(dev, CPU_GEN, (dwRegValue|CPU_GEN_BB_RST)); - _rtl92e_phy_config_bb(dev, BaseBand_Config_AGC_TAB); + _rtl92e_phy_config_bb(dev, BB_CONFIG_AGC_TAB); if (priv->ic_cut > VERSION_8190_BD) { if (priv->rf_type == RF_2T4R) |