diff options
| author | Niklas Söderlund <[email protected]> | 2023-02-11 15:36:55 +0100 | 
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2023-03-06 10:42:14 +0100 | 
| commit | 049f39d6d8cdf1ddae0e22021155d3af4e65e18c (patch) | |
| tree | 5ae1a219a88ab78f6da2f43ff1a8ca03c6b33b7e | |
| parent | 8947e5ae9589c57af246cdd149cf469aec5e4d3c (diff) | |
clk: renesas: r8a779g0: Add VIN clocks
Add the VIN module clocks, which are used by the VIN modules on the
Renesas R-Car V4H (R8A779G0) SoC.
Signed-off-by: Niklas Söderlund <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
| -rw-r--r-- | drivers/clk/renesas/r8a779g0-cpg-mssr.c | 16 | 
1 files changed, 16 insertions, 0 deletions
| diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index 0e3c8b1a7774..7cc580d67362 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -207,6 +207,22 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {  	DEF_MOD("tmu3",		716,	R8A779G0_CLK_SASYNCPERD2),  	DEF_MOD("tmu4",		717,	R8A779G0_CLK_SASYNCPERD2),  	DEF_MOD("tpu0",		718,	R8A779G0_CLK_SASYNCPERD4), +	DEF_MOD("vin00",	730,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin01",	731,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin02",	800,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin03",	801,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin04",	802,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin05",	803,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin06",	804,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin07",	805,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin10",	806,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin11",	807,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin12",	808,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin13",	809,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin14",	810,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin15",	811,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin16",	812,	R8A779G0_CLK_S0D4_VIO), +	DEF_MOD("vin17",	813,	R8A779G0_CLK_S0D4_VIO),  	DEF_MOD("vspd0",	830,	R8A779G0_CLK_VIOBUSD2),  	DEF_MOD("vspd1",	831,	R8A779G0_CLK_VIOBUSD2),  	DEF_MOD("wdt1:wdt0",	907,	R8A779G0_CLK_R), |