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authorSai Prakash Ranjan <[email protected]>2021-03-16 00:05:46 +0530
committerBjorn Andersson <[email protected]>2021-04-05 22:29:05 -0500
commit0392968dbe099d343c676ea8fd1e878f1fd4682a (patch)
tree9b517dbd583dc4a47ed5d22632fbbf4ca7d88cc7
parent47498916afea14cee97d8ff137ad68ea67c15784 (diff)
arm64: dts: qcom: sc7280: Add device tree node for LLCC
Add a DT node for Last level cache (aka. system cache) controller which provides control over the last level cache present on SC7280 SoC. Signed-off-by: Sai Prakash Ranjan <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Link: https://lore.kernel.org/r/5bacaa8350e0d9553dccd623a15513590e795b47.1615832893.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <[email protected]>
-rw-r--r--arch/arm64/boot/dts/qcom/sc7280.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 39cf0bee1eb0..3cc4c3e48b9b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -305,6 +305,13 @@
};
};
+ system-cache-controller@9200000 {
+ compatible = "qcom,sc7280-llcc";
+ reg = <0 0x09200000 0 0xd0000>, <0 0x09600000 0 0x50000>;
+ reg-names = "llcc_base", "llcc_broadcast_base";
+ interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
pdc: interrupt-controller@b220000 {
compatible = "qcom,sc7280-pdc", "qcom,pdc";
reg = <0 0x0b220000 0 0x30000>;