diff options
author | Andi Kleen <[email protected]> | 2016-05-19 17:09:59 -0700 |
---|---|---|
committer | Ingo Molnar <[email protected]> | 2016-06-03 09:41:25 +0200 |
commit | 030ba6cd105c68ce919c5e239853b567490cd059 (patch) | |
tree | bf56a2794790b140c58c299c3c564ab02e140017 | |
parent | eb12b8ece71cfd4c96df37198b9903fc639768d8 (diff) |
perf/x86/intel: Use new topology_max_smt_threads() in HT leak workaround
Now that we have topology_max_smt_threads() use it
to detect the HT workarounds for older CPUs.
Signed-off-by: Andi Kleen <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Cc: Alexander Shishkin <[email protected]>
Cc: Arnaldo Carvalho de Melo <[email protected]>
Cc: Jiri Olsa <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Stephane Eranian <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Vince Weaver <[email protected]>
Cc: [email protected]
Cc: [email protected]
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>
-rw-r--r-- | arch/x86/events/intel/core.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 593b1676b5d1..5081b4cdad0d 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3989,16 +3989,14 @@ __init int intel_pmu_init(void) */ static __init int fixup_ht_bug(void) { - int cpu = smp_processor_id(); - int w, c; + int c; /* * problem not present on this CPU model, nothing to do */ if (!(x86_pmu.flags & PMU_FL_EXCL_ENABLED)) return 0; - w = cpumask_weight(topology_sibling_cpumask(cpu)); - if (w > 1) { + if (topology_max_smt_threads() > 1) { pr_info("PMU erratum BJ122, BV98, HSD29 worked around, HT is on\n"); return 0; } |