diff options
| author | Ville Syrjälä <[email protected]> | 2018-11-14 23:07:18 +0200 |
|---|---|---|
| committer | Ville Syrjälä <[email protected]> | 2018-11-28 21:51:50 +0200 |
| commit | 019575a58c84b1cd534d1dd1cad36592995f8f6b (patch) | |
| tree | 8d9e7bd70ee9352648455dd683034119b5ef689f | |
| parent | 83234d13f9fda65e6c1a5e5900aa247334b1a621 (diff) | |
drm/i915: Move single buffered plane register writes to the end
The plane color correction registers are single buffered. So
ideally we would write them at the start of vblank just after the
double buffered plane registers have been latched. Since we have
no convenient way to do that for now let's at least move the
single buffered register writes to happen after the double
buffered registers have been written.
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Matt Roper <[email protected]>
Reviewed-by: Maarten Lankhorst <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_sprite.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 6cefe5f7a374..0548b996693f 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -824,8 +824,6 @@ vlv_update_plane(struct intel_plane *plane, spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); - vlv_update_clrc(plane_state); - I915_WRITE_FW(SPSTRIDE(pipe, plane_id), plane_state->color_plane[0].stride); I915_WRITE_FW(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x); @@ -853,6 +851,8 @@ vlv_update_plane(struct intel_plane *plane, I915_WRITE_FW(SPSURF(pipe, plane_id), intel_plane_ggtt_offset(plane_state) + sprsurf_offset); + vlv_update_clrc(plane_state); + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); } |