diff options
| author | Chris Wilson <[email protected]> | 2021-01-11 22:52:19 +0000 |
|---|---|---|
| committer | Chris Wilson <[email protected]> | 2021-01-12 09:17:06 +0000 |
| commit | 008ead6ef8f588a8c832adfe9db201d9be5fd410 (patch) | |
| tree | 3b2609cfebfe62cc1fadbdcbf2aa9f6cb7baf4b7 | |
| parent | eebfb32e26851662d24ea86dd381fd0f83cd4b47 (diff) | |
drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail
The mitigation is required for all gen7 platforms, now that it does not
cause GPU hangs, restore it for Ivybridge and Baytrail.
Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
Signed-off-by: Chris Wilson <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Cc: Prathap Kumar Valsan <[email protected]>
Cc: Akeem G Abodunrin <[email protected]>
Cc: Bloomfield Jon <[email protected]>
Reviewed-by: Akeem G Abodunrin <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_ring_submission.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c index 1c6d421f6fe5..724d56c9583d 100644 --- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c +++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c @@ -1324,7 +1324,7 @@ int intel_ring_submission_setup(struct intel_engine_cs *engine) GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma); - if (IS_HASWELL(engine->i915) && engine->class == RENDER_CLASS) { + if (IS_GEN(engine->i915, 7) && engine->class == RENDER_CLASS) { err = gen7_ctx_switch_bb_init(engine); if (err) goto err_ring_unpin; |