From aecf425fa948e0ea9d0f7d86317b2c509108daae Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Fri, 4 Jun 2021 17:09:36 +0800 Subject: clk: imx: scu: bypass cpu clock save and restore CPU clock is managed by ATF. No need save and restore. Signed-off-by: Dong Aisheng Reviewed-by: Abel Vesa Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-scu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers') diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c index 680b2650fd45..d87a1a1b297e 100644 --- a/drivers/clk/imx/clk-scu.c +++ b/drivers/clk/imx/clk-scu.c @@ -538,6 +538,11 @@ static int imx_clk_scu_probe(struct platform_device *pdev) static int __maybe_unused imx_clk_scu_suspend(struct device *dev) { struct clk_scu *clk = dev_get_drvdata(dev); + u32 rsrc_id = clk->rsrc_id; + + if ((rsrc_id == IMX_SC_R_A35) || (rsrc_id == IMX_SC_R_A53) || + (rsrc_id == IMX_SC_R_A72)) + return 0; clk->rate = clk_hw_get_rate(&clk->hw); clk->is_enabled = clk_hw_is_enabled(&clk->hw); @@ -554,8 +559,13 @@ static int __maybe_unused imx_clk_scu_suspend(struct device *dev) static int __maybe_unused imx_clk_scu_resume(struct device *dev) { struct clk_scu *clk = dev_get_drvdata(dev); + u32 rsrc_id = clk->rsrc_id; int ret = 0; + if ((rsrc_id == IMX_SC_R_A35) || (rsrc_id == IMX_SC_R_A53) || + (rsrc_id == IMX_SC_R_A72)) + return 0; + if (clk->rate) { ret = clk_scu_set_rate(&clk->hw, clk->rate, 0); dev_dbg(dev, "restore rate %d %s\n", clk->rate, -- cgit