From 3c269ba6d8af044ecdb69c610b24697a43ef71c3 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 24 Aug 2019 02:10:36 +0200 Subject: pwm: atmel: Add a hint where to find hardware documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Most Microchip (formerly Atmel) chips have publicly available manuals. A comprehensive list is already contained in the documentation folder. Reference this list in the header of the driver to allow reviewers to find the relevant manuals. Signed-off-by: Uwe Kleine-König Acked-by: Nicolas Ferre Signed-off-by: Thierry Reding --- drivers/pwm/pwm-atmel.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/pwm/pwm-atmel.c') diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index 9ba733467e26..cd6be47b5160 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -4,6 +4,9 @@ * * Copyright (C) 2013 Atmel Corporation * Bo Shen + * + * Links to reference manuals for the supported PWM chips can be found in + * Documentation/arm/microchip.rst. */ #include -- cgit From ff55e7a314143e717f4d96271b541c29111502df Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 24 Aug 2019 02:10:37 +0200 Subject: pwm: atmel: Use a constant for maximum prescale value MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The maximal prescale value is 10 for all supported variants. So drop the member in the variant description and introduce a global constant instead. This reduces the size of the variant descriptions and the .apply() callback can be compiled a bit more effectively. Acked-by: Claudiu Beznea Signed-off-by: Uwe Kleine-König Signed-off-by: Thierry Reding --- drivers/pwm/pwm-atmel.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'drivers/pwm/pwm-atmel.c') diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index cd6be47b5160..199255b26aaa 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -50,6 +50,8 @@ #define PWMV2_CPRD 0x0C #define PWMV2_CPRDUPD 0x10 +#define PWM_MAX_PRES 10 + struct atmel_pwm_registers { u8 period; u8 period_upd; @@ -59,7 +61,6 @@ struct atmel_pwm_registers { struct atmel_pwm_config { u32 max_period; - u32 max_pres; }; struct atmel_pwm_data { @@ -126,7 +127,7 @@ static int atmel_pwm_calculate_cprd_and_pres(struct pwm_chip *chip, for (*pres = 0; cycles > atmel_pwm->data->cfg.max_period; cycles >>= 1) (*pres)++; - if (*pres > atmel_pwm->data->cfg.max_pres) { + if (*pres > PWM_MAX_PRES) { dev_err(chip->dev, "pres exceeds the maximum value\n"); return -EINVAL; } @@ -289,7 +290,6 @@ static const struct atmel_pwm_data atmel_sam9rl_pwm_data = { .cfg = { /* 16 bits to keep period and duty. */ .max_period = 0xffff, - .max_pres = 10, }, }; @@ -303,7 +303,6 @@ static const struct atmel_pwm_data atmel_sama5_pwm_data = { .cfg = { /* 16 bits to keep period and duty. */ .max_period = 0xffff, - .max_pres = 10, }, }; @@ -317,7 +316,6 @@ static const struct atmel_pwm_data mchp_sam9x60_pwm_data = { .cfg = { /* 32 bits to keep period and duty. */ .max_period = 0xffffffff, - .max_pres = 10, }, }; -- cgit From 2101c878f767fc6341ce0057e3b53d6129e76d99 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 24 Aug 2019 02:10:38 +0200 Subject: pwm: atmel: Replace loop in prescale calculation by ad-hoc calculation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The calculated values are the same with the modified algorithm. The only difference is that the calculation is a bit more efficient. Acked-by: Claudiu Beznea Signed-off-by: Uwe Kleine-König Signed-off-by: Thierry Reding --- drivers/pwm/pwm-atmel.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) (limited to 'drivers/pwm/pwm-atmel.c') diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index 199255b26aaa..c9fdf1671bb3 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -60,7 +60,7 @@ struct atmel_pwm_registers { }; struct atmel_pwm_config { - u32 max_period; + u32 period_bits; }; struct atmel_pwm_data { @@ -119,17 +119,27 @@ static int atmel_pwm_calculate_cprd_and_pres(struct pwm_chip *chip, { struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip); unsigned long long cycles = state->period; + int shift; /* Calculate the period cycles and prescale value */ cycles *= clk_get_rate(atmel_pwm->clk); do_div(cycles, NSEC_PER_SEC); - for (*pres = 0; cycles > atmel_pwm->data->cfg.max_period; cycles >>= 1) - (*pres)++; + /* + * The register for the period length is cfg.period_bits bits wide. + * So for each bit the number of clock cycles is wider divide the input + * clock frequency by two using pres and shift cprd accordingly. + */ + shift = fls(cycles) - atmel_pwm->data->cfg.period_bits; - if (*pres > PWM_MAX_PRES) { + if (shift > PWM_MAX_PRES) { dev_err(chip->dev, "pres exceeds the maximum value\n"); return -EINVAL; + } else if (shift > 0) { + *pres = shift; + cycles >>= *pres; + } else { + *pres = 0; } *cprd = cycles; @@ -289,7 +299,7 @@ static const struct atmel_pwm_data atmel_sam9rl_pwm_data = { }, .cfg = { /* 16 bits to keep period and duty. */ - .max_period = 0xffff, + .period_bits = 16, }, }; @@ -302,7 +312,7 @@ static const struct atmel_pwm_data atmel_sama5_pwm_data = { }, .cfg = { /* 16 bits to keep period and duty. */ - .max_period = 0xffff, + .period_bits = 16, }, }; @@ -315,7 +325,7 @@ static const struct atmel_pwm_data mchp_sam9x60_pwm_data = { }, .cfg = { /* 32 bits to keep period and duty. */ - .max_period = 0xffffffff, + .period_bits = 32, }, }; -- cgit From 998d189a817b8aae5b9e416c40dcb35b1fd79d3c Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 24 Aug 2019 02:10:39 +0200 Subject: pwm: atmel: Document known weaknesses of both hardware and software MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This documents the my findings while reading through the driver and the reference manual. Signed-off-by: Uwe Kleine-König Signed-off-by: Thierry Reding --- drivers/pwm/pwm-atmel.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers/pwm/pwm-atmel.c') diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index c9fdf1671bb3..3ff3c171437e 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -7,6 +7,16 @@ * * Links to reference manuals for the supported PWM chips can be found in * Documentation/arm/microchip.rst. + * + * Limitations: + * - Periods start with the inactive level. + * - Hardware has to be stopped in general to update settings. + * + * Software bugs/possible improvements: + * - When atmel_pwm_apply() is called with state->enabled=false a change in + * state->polarity isn't honored. + * - Instead of sleeping to wait for a completed period, the interrupt + * functionality could be used. */ #include -- cgit From 02afb811e0cf96958ac69c4b3372088180c829a7 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 24 Aug 2019 02:10:40 +0200 Subject: pwm: atmel: Use register accessors for channels MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This makes it a bit easier when instrumenting register access to only have to add code in one place. Signed-off-by: Uwe Kleine-König Signed-off-by: Thierry Reding --- drivers/pwm/pwm-atmel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/pwm/pwm-atmel.c') diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index 3ff3c171437e..b8b47c315ac0 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -111,7 +111,7 @@ static inline u32 atmel_pwm_ch_readl(struct atmel_pwm_chip *chip, { unsigned long base = PWM_CH_REG_OFFSET + ch * PWM_CH_REG_SIZE; - return readl_relaxed(chip->base + base + offset); + return atmel_pwm_readl(chip, base + offset); } static inline void atmel_pwm_ch_writel(struct atmel_pwm_chip *chip, @@ -120,7 +120,7 @@ static inline void atmel_pwm_ch_writel(struct atmel_pwm_chip *chip, { unsigned long base = PWM_CH_REG_OFFSET + ch * PWM_CH_REG_SIZE; - writel_relaxed(val, chip->base + base + offset); + atmel_pwm_writel(chip, base + offset, val); } static int atmel_pwm_calculate_cprd_and_pres(struct pwm_chip *chip, -- cgit From 651b510a74d4e473281efc4eaf2a83963988de48 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 24 Aug 2019 02:10:41 +0200 Subject: pwm: atmel: Implement .get_state() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This function reads back the configured parameters from the hardware. As .apply() rounds down (mostly) I'm rounding up in .get_state() to achieve that applying a state just read from hardware is a no-op. Signed-off-by: Uwe Kleine-König Acked-by: Claudiu Beznea Signed-off-by: Thierry Reding --- drivers/pwm/pwm-atmel.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) (limited to 'drivers/pwm/pwm-atmel.c') diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index b8b47c315ac0..6161e7e3e9ac 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -295,8 +295,48 @@ static int atmel_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, return 0; } +static void atmel_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, + struct pwm_state *state) +{ + struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip); + u32 sr, cmr; + + sr = atmel_pwm_readl(atmel_pwm, PWM_SR); + cmr = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR); + + if (sr & (1 << pwm->hwpwm)) { + unsigned long rate = clk_get_rate(atmel_pwm->clk); + u32 cdty, cprd, pres; + u64 tmp; + + pres = cmr & PWM_CMR_CPRE_MSK; + + cprd = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, + atmel_pwm->data->regs.period); + tmp = (u64)cprd * NSEC_PER_SEC; + tmp <<= pres; + state->period = DIV64_U64_ROUND_UP(tmp, rate); + + cdty = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, + atmel_pwm->data->regs.duty); + tmp = (u64)cdty * NSEC_PER_SEC; + tmp <<= pres; + state->duty_cycle = DIV64_U64_ROUND_UP(tmp, rate); + + state->enabled = true; + } else { + state->enabled = false; + } + + if (cmr & PWM_CMR_CPOL) + state->polarity = PWM_POLARITY_INVERSED; + else + state->polarity = PWM_POLARITY_NORMAL; +} + static const struct pwm_ops atmel_pwm_ops = { .apply = atmel_pwm_apply, + .get_state = atmel_pwm_get_state, .owner = THIS_MODULE, }; -- cgit