From 28e5c9d601fb8c2f387516b095a9cf6ddf7c00d5 Mon Sep 17 00:00:00 2001 From: Wesley Chalmers Date: Fri, 3 Mar 2023 14:44:53 -0500 Subject: drm/amd/display: Make DCN32 3dlut function available to future DCNs [Why & How] Make DCN32 3dlut function non-static and thus available for future DCNs. Reviewed-by: Chris Park Acked-by: Qingqing Zhuo Signed-off-by: Wesley Chalmers Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c') diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c index 5016b1313f3d..42255c22605d 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c @@ -414,7 +414,7 @@ void dcn32_subvp_pipe_control_lock(struct dc *dc, } -static bool dcn32_set_mpc_shaper_3dlut( +bool dcn32_set_mpc_shaper_3dlut( struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream) { struct dpp *dpp_base = pipe_ctx->plane_res.dpp; -- cgit