From a12cf0a8c6e2763ac865aa31f296557e07432b8a Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Tue, 9 Nov 2010 10:12:29 +1000 Subject: m68knommu: create bit definitions for the version 2 ColdFire cache controller The version 2 ColdFire CPU based cores all contain a similar cache controller unit. Create a set of bit flag definitions for the supporting registers. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m527xsim.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/m68k/include/asm/m527xsim.h') diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 8a5a1ab57d01..e8042e8bc003 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h @@ -14,6 +14,7 @@ #define CPU_NAME "COLDFIRE(m527x)" #define CPU_INSTR_PER_JIFFY 3 +#include /* * Define the 5270/5271 SIM register set addresses. -- cgit