From ea3d5226f52ef30f52aa0a04f47f5919c7facacf Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 26 Feb 2007 09:21:46 -0800 Subject: Revert "[PATCH] i386: add idle notifier" This reverts commit 2ff2d3d74705d34ab71b21f54634fcf50d57bdd5. Uwe Bugla reports that he cannot mount a floppy drive any more, and Jiri Slaby bisected it down to this commit. Benjamin LaHaise also points out that this is a big hot-path, and that interrupt delivery while idle is very common and should not go through all these expensive gyrations. Fix up conflicts in arch/i386/kernel/apic.c and arch/i386/kernel/irq.c due to other unrelated irq changes. Cc: Stephane Eranian Cc: Andi Kleen Cc: Andrew Morton Cc: Uwe Bugla Cc: Jiri Slaby Signed-off-by: Linus Torvalds --- arch/i386/kernel/apic.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch/i386/kernel/apic.c') diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c index 9655c233e6f1..7a2c9cbdb511 100644 --- a/arch/i386/kernel/apic.c +++ b/arch/i386/kernel/apic.c @@ -38,7 +38,6 @@ #include #include #include -#include #include #include @@ -561,7 +560,6 @@ void fastcall smp_apic_timer_interrupt(struct pt_regs *regs) * Besides, if we don't timer interrupts ignore the global * interrupt lock, which is the WrongThing (tm) to do. */ - exit_idle(); irq_enter(); local_apic_timer_interrupt(); irq_exit(); @@ -1221,7 +1219,6 @@ void smp_spurious_interrupt(struct pt_regs *regs) { unsigned long v; - exit_idle(); irq_enter(); /* * Check if this really is a spurious interrupt and ACK it @@ -1245,7 +1242,6 @@ void smp_error_interrupt(struct pt_regs *regs) { unsigned long v, v1; - exit_idle(); irq_enter(); /* First tickle the hardware, only then report what went on. -- REW */ v = apic_read(APIC_ESR); -- cgit From a5f5e43e2b1377392f9afe93aca29b9abf1d6a44 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 5 Mar 2007 00:30:45 -0800 Subject: [PATCH] fix "NMI appears to be stuck" Testing NMI watchdog ... CPU#0: NMI appears to be stuck (54->54)! CPU#1: NMI appears to be stuck (0->0)! Keep the PIT/HPET alive when nmi_watchdog = 1 is given on the command line. Signed-off-by: Thomas Gleixner Cc: Ingo Molnar Cc: Andi Kleen Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/i386/kernel/apic.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'arch/i386/kernel/apic.c') diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c index 7a2c9cbdb511..2383bcf18c5d 100644 --- a/arch/i386/kernel/apic.c +++ b/arch/i386/kernel/apic.c @@ -493,8 +493,15 @@ void __init setup_boot_APIC_clock(void) /* No broadcast on UP ! */ if (num_possible_cpus() == 1) return; - } else - lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; + } else { + /* + * If nmi_watchdog is set to IO_APIC, we need the + * PIT/HPET going. Otherwise register lapic as a dummy + * device. + */ + if (nmi_watchdog != NMI_IO_APIC) + lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; + } /* Setup the lapic or request the broadcast */ setup_APIC_timer(); -- cgit From ca1b940ce6495541efe76499b3de39aa5e4941ed Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 18 Mar 2007 01:26:13 -0800 Subject: [PATCH] i386: trust the PM-Timer calibration of the local APIC timer When PM-Timer is available for local APIC timer calibration we can skip the verification of the calibrated time value. The resulting error is quite small on a bunch of evaluated platforms and is less harming than the observed false positives. We need to keep the verification on systems, which have no PM-Timer to avoid bogus local APIC timer calibrations in the range of factor 2-10, which can be observed when swicthing off the PM-timer support in the kernel configuration. The wrong calibration values are probably caused by SMM code trying to emulate a PS/2 keyboard from a (maybe connected or not) USB keyboard. This prohibits the accurate delivery of PIT interrupts, which are used to calibrate the local APIC timer. Unfortunately we have no way to disable this BIOS misfeature in the early boot process. Add also the dropped cpu_relax() back to the wait loops. Signed-off-by: Thomas Gleixner Acked-by: Ingo Molnar Acked-by: Andi Kleen Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/i386/kernel/apic.c | 78 +++++++++++++++++-------------------------------- 1 file changed, 27 insertions(+), 51 deletions(-) (limited to 'arch/i386/kernel/apic.c') diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c index 2383bcf18c5d..5cff7970911e 100644 --- a/arch/i386/kernel/apic.c +++ b/arch/i386/kernel/apic.c @@ -338,6 +338,7 @@ void __init setup_boot_APIC_clock(void) void (*real_handler)(struct clock_event_device *dev); unsigned long deltaj; long delta, deltapm; + int pm_referenced = 0; apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n" "calibrating APIC timer ...\n"); @@ -357,7 +358,8 @@ void __init setup_boot_APIC_clock(void) /* Let the interrupts run */ local_irq_enable(); - while(lapic_cal_loops <= LAPIC_CAL_LOOPS); + while (lapic_cal_loops <= LAPIC_CAL_LOOPS) + cpu_relax(); local_irq_disable(); @@ -394,6 +396,7 @@ void __init setup_boot_APIC_clock(void) "%lu (%ld)\n", (unsigned long) res, delta); delta = (long) res; } + pm_referenced = 1; } /* Calculate the scaled math multiplication factor */ @@ -423,68 +426,41 @@ void __init setup_boot_APIC_clock(void) calibration_result / (1000000 / HZ), calibration_result % (1000000 / HZ)); - - apic_printk(APIC_VERBOSE, "... verify APIC timer\n"); - - /* - * Setup the apic timer manually - */ local_apic_timer_verify_ok = 1; - levt->event_handler = lapic_cal_handler; - lapic_timer_setup(CLOCK_EVT_MODE_PERIODIC, levt); - lapic_cal_loops = -1; - /* Let the interrupts run */ - local_irq_enable(); + /* We trust the pm timer based calibration */ + if (!pm_referenced) { + apic_printk(APIC_VERBOSE, "... verify APIC timer\n"); - while(lapic_cal_loops <= LAPIC_CAL_LOOPS); + /* + * Setup the apic timer manually + */ + levt->event_handler = lapic_cal_handler; + lapic_timer_setup(CLOCK_EVT_MODE_PERIODIC, levt); + lapic_cal_loops = -1; - local_irq_disable(); + /* Let the interrupts run */ + local_irq_enable(); - /* Stop the lapic timer */ - lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt); + while(lapic_cal_loops <= LAPIC_CAL_LOOPS) + cpu_relax(); - local_irq_enable(); + local_irq_disable(); - /* Jiffies delta */ - deltaj = lapic_cal_j2 - lapic_cal_j1; - apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj); + /* Stop the lapic timer */ + lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt); - /* Check, if the PM timer is available */ - deltapm = lapic_cal_pm2 - lapic_cal_pm1; - apic_printk(APIC_VERBOSE, "... PM timer delta = %ld\n", deltapm); + local_irq_enable(); - local_apic_timer_verify_ok = 0; + /* Jiffies delta */ + deltaj = lapic_cal_j2 - lapic_cal_j1; + apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj); - if (deltapm) { - if (deltapm > (pm_100ms - pm_thresh) && - deltapm < (pm_100ms + pm_thresh)) { - apic_printk(APIC_VERBOSE, "... PM timer result ok\n"); - /* Check, if the jiffies result is consistent */ - if (deltaj < LAPIC_CAL_LOOPS-2 || - deltaj > LAPIC_CAL_LOOPS+2) { - /* - * Not sure, what we can do about this one. - * When high resultion timers are active - * and the lapic timer does not stop in C3 - * we are fine. Otherwise more trouble might - * be waiting. -- tglx - */ - printk(KERN_WARNING "Global event device %s " - "has wrong frequency " - "(%lu ticks instead of %d)\n", - global_clock_event->name, deltaj, - LAPIC_CAL_LOOPS); - } - local_apic_timer_verify_ok = 1; - } - } else { /* Check, if the jiffies result is consistent */ - if (deltaj >= LAPIC_CAL_LOOPS-2 && - deltaj <= LAPIC_CAL_LOOPS+2) { + if (deltaj >= LAPIC_CAL_LOOPS-2 && deltaj <= LAPIC_CAL_LOOPS+2) apic_printk(APIC_VERBOSE, "... jiffies result ok\n"); - local_apic_timer_verify_ok = 1; - } + else + local_apic_timer_verify_ok = 0; } if (!local_apic_timer_verify_ok) { -- cgit From ad62ca2bd89f72e9b80dfaffc463e87bec5e75cb Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 22 Mar 2007 00:11:21 -0800 Subject: [PATCH] i386: disable local apic timer via command line or dmi quirk The local APIC timer stops to work in deeper C-States. This is handled by the ACPI code and a broadcast mechanism in the clockevents / tick managment code. Some systems do not expose the deeper C-States to the kernel, but switch into deeper C-States behind the kernels back. This delays the local apic timer interrupts for ever and makes the systems unusable. Add a command line option to disable the local apic timer and a dmi quirk for known broken systems. Andi sayeth: While not wrong by itself i think it is still better to use some heuristic -- like "has battery in ACPI" With the DMI table if the problem is more wide spread we will just continue extending it. But anyways should be ok now for .21 although I'm not really happy with it. Signed-off-by: Thomas Gleixner Acked-by: Ingo Molnar Cc: john stultz Grudgingly-acked-by: Andi Kleen Cc: Len Brown Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- Documentation/kernel-parameters.txt | 2 ++ arch/i386/kernel/apic.c | 52 +++++++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) (limited to 'arch/i386/kernel/apic.c') diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 856c8b114e71..06377c76e734 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1117,6 +1117,8 @@ and is between 256 and 4096 characters. It is defined in the file nolapic [IA-32,APIC] Do not enable or use the local APIC. + nolapic_timer [IA-32,APIC] Do not use the local APIC timer. + noltlbs [PPC] Do not use large page/tlb entries for kernel lowmem mapping on PPC40x. diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c index 5cff7970911e..36825117835d 100644 --- a/arch/i386/kernel/apic.c +++ b/arch/i386/kernel/apic.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -61,6 +62,8 @@ static int enable_local_apic __initdata = 0; /* Local APIC timer verification ok */ static int local_apic_timer_verify_ok; +/* Disable local APIC timer from the kernel commandline or via dmi quirk */ +static int local_apic_timer_disabled; /* * Debug level, exported for io_apic.c @@ -265,6 +268,32 @@ static void __devinit setup_APIC_timer(void) clockevents_register_device(levt); } +/* + * Detect systems with known broken BIOS implementations + */ +static int __init lapic_check_broken_bios(struct dmi_system_id *d) +{ + printk(KERN_NOTICE "%s detected: disabling lapic timer.\n", + d->ident); + local_apic_timer_disabled = 1; + return 0; +} + +static struct dmi_system_id __initdata broken_bios_dmi_table[] = { + { + /* + * BIOS exports only C1 state, but uses deeper power + * modes behind the kernels back. + */ + .callback = lapic_check_broken_bios, + .ident = "HP nx6325", + .matches = { + DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), + }, + }, + {} +}; + /* * In this functions we calibrate APIC bus clocks to the external timer. * @@ -340,6 +369,22 @@ void __init setup_boot_APIC_clock(void) long delta, deltapm; int pm_referenced = 0; + /* Detect know broken systems */ + dmi_check_system(broken_bios_dmi_table); + + /* + * The local apic timer can be disabled via the kernel + * commandline or from the dmi quirk above. Register the lapic + * timer as a dummy clock event source on SMP systems, so the + * broadcast mechanism is used. On UP systems simply ignore it. + */ + if (local_apic_timer_disabled) { + /* No broadcast on UP ! */ + if (num_possible_cpus() > 1) + setup_APIC_timer(); + return; + } + apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n" "calibrating APIC timer ...\n"); @@ -1179,6 +1224,13 @@ static int __init parse_nolapic(char *arg) } early_param("nolapic", parse_nolapic); +static int __init parse_disable_lapic_timer(char *arg) +{ + local_apic_timer_disabled = 1; + return 0; +} +early_param("nolapic_timer", parse_disable_lapic_timer); + static int __init apic_set_verbosity(char *str) { if (strcmp("debug", str) == 0) -- cgit From 4edc5db83f574dfcc8be35b7b96760ded543b360 Mon Sep 17 00:00:00 2001 From: Ingo Molnar Date: Thu, 22 Mar 2007 10:31:19 +0100 Subject: [PATCH] setup_boot_APIC_clock() irq-enable fix latest -git triggers an irqtrace/lockdep warning of a leaked irqs-off condition: BUG: at kernel/fork.c:1033 copy_process() after some debugging it turns out that commit ca1b940c accidentally left interrupts disabled - which trickled down all the way to the first time we fork a kernel thread and triggered the warning. the fix is to re-enable interrupts in the 'else' branch of setup_boot_APIC_clock()'s pmtimers calibration path. Reported-by: Michal Piotrowski Signed-off-by: Ingo Molnar Acked-by: Thomas Gleixner Signed-off-by: Linus Torvalds --- arch/i386/kernel/apic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/i386/kernel/apic.c') diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c index 36825117835d..244c3fe9b8c3 100644 --- a/arch/i386/kernel/apic.c +++ b/arch/i386/kernel/apic.c @@ -506,7 +506,8 @@ void __init setup_boot_APIC_clock(void) apic_printk(APIC_VERBOSE, "... jiffies result ok\n"); else local_apic_timer_verify_ok = 0; - } + } else + local_irq_enable(); if (!local_apic_timer_verify_ok) { printk(KERN_WARNING -- cgit From e585bef815c0315f2730d7bb4e15b82602454efd Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 23 Mar 2007 16:08:01 +0100 Subject: [PATCH] i386: add command line option "local_apic_timer_c2_ok" It turned out that it is almost impossible to trust ACPI, BIOS & Co. regarding the C states. This was the reason to switch the local apic timer off in C2 state already. OTOH there are sane and well behaving systems, which get punished by that decision. Allow the user to confirm that the local apic timer is trustworthy in C2 state. This keeps the default behaviour on the safe side. Signed-off-by: Thomas Gleixner Acked-by: Ingo Molnar Signed-off-by: Linus Torvalds --- Documentation/kernel-parameters.txt | 3 +++ arch/i386/kernel/apic.c | 10 ++++++++++ drivers/acpi/processor_idle.c | 3 ++- include/asm-i386/apic.h | 1 + 4 files changed, 16 insertions(+), 1 deletion(-) (limited to 'arch/i386/kernel/apic.c') diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index e39ab0c99fbb..09640a8f7ceb 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -780,6 +780,9 @@ and is between 256 and 4096 characters. It is defined in the file lapic [IA-32,APIC] Enable the local APIC even if BIOS disabled it. + lapic_timer_c2_ok [IA-32,APIC] trust the local apic timer in + C2 power state. + lasi= [HW,SCSI] PARISC LASI driver for the 53c700 chip Format: addr:,irq: diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c index 244c3fe9b8c3..e88415282a6f 100644 --- a/arch/i386/kernel/apic.c +++ b/arch/i386/kernel/apic.c @@ -64,6 +64,9 @@ static int enable_local_apic __initdata = 0; static int local_apic_timer_verify_ok; /* Disable local APIC timer from the kernel commandline or via dmi quirk */ static int local_apic_timer_disabled; +/* Local APIC timer works in C2 */ +int local_apic_timer_c2_ok; +EXPORT_SYMBOL_GPL(local_apic_timer_c2_ok); /* * Debug level, exported for io_apic.c @@ -1232,6 +1235,13 @@ static int __init parse_disable_lapic_timer(char *arg) } early_param("nolapic_timer", parse_disable_lapic_timer); +static int __init parse_lapic_timer_c2_ok(char *arg) +{ + local_apic_timer_c2_ok = 1; + return 0; +} +early_param("lapic_timer_c2_ok", parse_lapic_timer_c2_ok); + static int __init apic_set_verbosity(char *str) { if (strcmp("debug", str) == 0) diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index 60773005b8af..cdf78943af4d 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -268,6 +268,7 @@ static void acpi_timer_check_state(int state, struct acpi_processor *pr, struct acpi_processor_cx *cx) { struct acpi_processor_power *pwr = &pr->power; + u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; /* * Check, if one of the previous states already marked the lapic @@ -276,7 +277,7 @@ static void acpi_timer_check_state(int state, struct acpi_processor *pr, if (pwr->timer_broadcast_on_state < state) return; - if (cx->type >= ACPI_STATE_C2) + if (cx->type >= type) pr->power.timer_broadcast_on_state = state; } diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h index cc6b1652249a..a19810a08ae9 100644 --- a/include/asm-i386/apic.h +++ b/include/asm-i386/apic.h @@ -117,6 +117,7 @@ extern void enable_NMI_through_LVT0 (void * dummy); #define ARCH_APICTIMER_STOPS_ON_C3 1 extern int timer_over_8254; +extern int local_apic_timer_c2_ok; #else /* !CONFIG_X86_LOCAL_APIC */ static inline void lapic_shutdown(void) { } -- cgit From 3556ddfa9284a86a59a9b78fe5894430f6ab4eef Mon Sep 17 00:00:00 2001 From: Andi Kleen Date: Mon, 2 Apr 2007 12:14:12 +0200 Subject: [PATCH] x86-64: Disable local APIC timer use on AMD systems with C1E AMD dual core laptops with C1E do not run the APIC timer correctly when they go idle. Previously the code assumed this only happened on C2 or deeper. But not all of these systems report support C2. Use a AMD supplied snippet to detect C1E being enabled and then disable local apic timer use. This supercedes an earlier workaround using DMI detection of specific systems. Thanks to Mark Langsdorf for the detection snippet. Signed-off-by: Andi Kleen --- arch/i386/kernel/apic.c | 32 +++----------------------------- arch/i386/kernel/cpu/amd.c | 34 ++++++++++++++++++++++++++++++++++ include/asm-i386/cpufeature.h | 1 + include/asm-i386/msr.h | 2 ++ 4 files changed, 40 insertions(+), 29 deletions(-) (limited to 'arch/i386/kernel/apic.c') diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c index e88415282a6f..93aa911646ad 100644 --- a/arch/i386/kernel/apic.c +++ b/arch/i386/kernel/apic.c @@ -271,32 +271,6 @@ static void __devinit setup_APIC_timer(void) clockevents_register_device(levt); } -/* - * Detect systems with known broken BIOS implementations - */ -static int __init lapic_check_broken_bios(struct dmi_system_id *d) -{ - printk(KERN_NOTICE "%s detected: disabling lapic timer.\n", - d->ident); - local_apic_timer_disabled = 1; - return 0; -} - -static struct dmi_system_id __initdata broken_bios_dmi_table[] = { - { - /* - * BIOS exports only C1 state, but uses deeper power - * modes behind the kernels back. - */ - .callback = lapic_check_broken_bios, - .ident = "HP nx6325", - .matches = { - DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), - }, - }, - {} -}; - /* * In this functions we calibrate APIC bus clocks to the external timer. * @@ -372,12 +346,12 @@ void __init setup_boot_APIC_clock(void) long delta, deltapm; int pm_referenced = 0; - /* Detect know broken systems */ - dmi_check_system(broken_bios_dmi_table); + if (boot_cpu_has(X86_FEATURE_LAPIC_TIMER_BROKEN)) + local_apic_timer_disabled = 1; /* * The local apic timer can be disabled via the kernel - * commandline or from the dmi quirk above. Register the lapic + * commandline or from the test above. Register the lapic * timer as a dummy clock event source on SMP systems, so the * broadcast mechanism is used. On UP systems simply ignore it. */ diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c index 41cfea57232b..2d47db482972 100644 --- a/arch/i386/kernel/cpu/amd.c +++ b/arch/i386/kernel/cpu/amd.c @@ -22,6 +22,37 @@ extern void vide(void); __asm__(".align 4\nvide: ret"); +#define ENABLE_C1E_MASK 0x18000000 +#define CPUID_PROCESSOR_SIGNATURE 1 +#define CPUID_XFAM 0x0ff00000 +#define CPUID_XFAM_K8 0x00000000 +#define CPUID_XFAM_10H 0x00100000 +#define CPUID_XFAM_11H 0x00200000 +#define CPUID_XMOD 0x000f0000 +#define CPUID_XMOD_REV_F 0x00040000 + +/* AMD systems with C1E don't have a working lAPIC timer. Check for that. */ +static __cpuinit int amd_apic_timer_broken(void) +{ + u32 lo, hi; + u32 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); + switch (eax & CPUID_XFAM) { + case CPUID_XFAM_K8: + if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F) + break; + case CPUID_XFAM_10H: + case CPUID_XFAM_11H: + rdmsr(MSR_K8_ENABLE_C1E, lo, hi); + if (lo & ENABLE_C1E_MASK) + return 1; + break; + default: + /* err on the side of caution */ + return 1; + } + return 0; +} + static void __cpuinit init_amd(struct cpuinfo_x86 *c) { u32 l, h; @@ -241,6 +272,9 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) if (cpuid_eax(0x80000000) >= 0x80000006) num_cache_leaves = 3; + + if (amd_apic_timer_broken()) + set_bit(X86_FEATURE_LAPIC_TIMER_BROKEN, c->x86_capability); } static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size) diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h index 3f92b94e0d75..d1b8e4ab6c1a 100644 --- a/include/asm-i386/cpufeature.h +++ b/include/asm-i386/cpufeature.h @@ -75,6 +75,7 @@ #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */ #define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ #define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ +#define X86_FEATURE_LAPIC_TIMER_BROKEN (3*32+ 14) /* lapic timer broken in C1 */ /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h index ec3b6803fd36..2ad3f30b1a68 100644 --- a/include/asm-i386/msr.h +++ b/include/asm-i386/msr.h @@ -275,6 +275,8 @@ static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) #define MSR_K7_FID_VID_CTL 0xC0010041 #define MSR_K7_FID_VID_STATUS 0xC0010042 +#define MSR_K8_ENABLE_C1E 0xC0010055 + /* extended feature register */ #define MSR_EFER 0xc0000080 -- cgit