From f447ed2dbc844d645ef8bf82cc04281fa4163aed Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Wed, 17 Oct 2012 19:46:49 -0500 Subject: zynq: use GIC device tree bindings The Zynq uses the cortex-a9-gic. This eliminates the need to hardcode register addresses. Signed-off-by: Josh Cartwright Cc: John Linn Acked-by: Arnd Bergmann Tested-by: Michal Simek --- arch/arm/mach-zynq/common.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index ab5cfddc0d7b..d73963b422af 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -55,12 +55,17 @@ static void __init xilinx_init_machine(void) of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); } +static struct of_device_id irq_match[] __initdata = { + { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, + { } +}; + /** * xilinx_irq_init() - Interrupt controller initialization for the GIC. */ static void __init xilinx_irq_init(void) { - gic_init(0, 29, SCU_GIC_DIST_BASE, SCU_GIC_CPU_BASE); + of_irq_init(irq_match); } /* The minimum devices needed to be mapped before the VM system is up and -- cgit From 0fcfdbcacf6fa234064126e5b18c720ca27bc6e7 Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Tue, 23 Oct 2012 17:34:22 -0500 Subject: zynq: use pl310 device tree bindings The Zynq has a PL310 L2 cache controller. Convert in-tree uses to using the device tree. Signed-off-by: Josh Cartwright Cc: John Linn Acked-by: Arnd Bergmann Tested-by: Michal Simek --- arch/arm/boot/dts/zynq-ep107.dts | 9 +++++++++ arch/arm/mach-zynq/common.c | 9 +-------- arch/arm/mach-zynq/include/mach/zynq_soc.h | 4 ---- 3 files changed, 10 insertions(+), 12 deletions(-) (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts index f9140901e8ef..574bc044f572 100644 --- a/arch/arm/boot/dts/zynq-ep107.dts +++ b/arch/arm/boot/dts/zynq-ep107.dts @@ -44,6 +44,15 @@ <0xF8F00100 0x100>; }; + L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0xF8F02000 0x1000>; + arm,data-latency = <2 3 2>; + arm,tag-latency = <2 3 2>; + cache-unified; + cache-level = <2>; + }; + uart0: uart@e0000000 { compatible = "xlnx,xuartps"; reg = <0xE0000000 0x1000>; diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index d73963b422af..056091a5a417 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -45,12 +45,10 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = { */ static void __init xilinx_init_machine(void) { -#ifdef CONFIG_CACHE_L2X0 /* * 64KB way size, 8-way associativity, parity disabled */ - l2x0_init(PL310_L2CC_BASE, 0x02060000, 0xF0F0FFFF); -#endif + l2x0_of_init(0x02060000, 0xF0F0FFFF); of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); } @@ -83,11 +81,6 @@ static struct map_desc io_desc[] __initdata = { .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), .length = SZ_8K, .type = MT_DEVICE, - }, { - .virtual = PL310_L2CC_VIRT, - .pfn = __phys_to_pfn(PL310_L2CC_PHYS), - .length = SZ_4K, - .type = MT_DEVICE, }, #ifdef CONFIG_DEBUG_LL diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index 3d1c6a6a8feb..218283a94247 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h @@ -25,9 +25,6 @@ #define TTC0_PHYS 0xF8001000 #define TTC0_VIRT TTC0_PHYS -#define PL310_L2CC_PHYS 0xF8F02000 -#define PL310_L2CC_VIRT PL310_L2CC_PHYS - #define SCU_PERIPH_PHYS 0xF8F00000 #define SCU_PERIPH_VIRT SCU_PERIPH_PHYS @@ -35,7 +32,6 @@ #define TTC0_BASE IOMEM(TTC0_VIRT) #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) -#define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT) /* * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical -- cgit From f7977939e956bdf6558ae6f4b743653db9f5c291 Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Wed, 24 Oct 2012 15:04:07 -0500 Subject: zynq: remove use of CLKDEV_LOOKUP The Zynq support in mainline does not (yet) make use of any of the generic clk or clk lookup functionality. Remove what is upstream for now, until the out-of-tree implementation is in suitable form for merging. An important side effect of this patch is that it allows the building of a Zynq kernel without running into unresolved symbol problems: drivers/built-in.o: In function `amba_get_enable_pclk': clkdev.c:(.text+0x444): undefined reference to `clk_enable' drivers/built-in.o: In function `amba_remove': clkdev.c:(.text+0x488): undefined reference to `clk_disable' drivers/built-in.o: In function `amba_probe': clkdev.c:(.text+0x540): undefined reference to `clk_disable' drivers/built-in.o: In function `amba_device_add': clkdev.c:(.text+0x77c): undefined reference to `clk_disable' drivers/built-in.o: In function `enable_clock': clkdev.c:(.text+0x29738): undefined reference to `clk_enable' drivers/built-in.o: In function `disable_clock': clkdev.c:(.text+0x29778): undefined reference to `clk_disable' drivers/built-in.o: In function `__pm_clk_remove': clkdev.c:(.text+0x297f8): undefined reference to `clk_disable' drivers/built-in.o: In function `pm_clk_suspend': clkdev.c:(.text+0x29bc8): undefined reference to `clk_disable' drivers/built-in.o: In function `pm_clk_resume': clkdev.c:(.text+0x29c28): undefined reference to `clk_enable' make[2]: *** [vmlinux] Error 1 make[1]: *** [sub-make] Error 2 make: *** [all] Error 2 In addition, eliminate Zynq's "use" of the versatile platform, as it is no longer needed. As Nick Bowler points out: For the record, I think this was introduced by commit 56a34b03ff427 ("ARM: versatile: Make plat-versatile clock optional") which forgot to select PLAT_VERSATILE_CLOCK on Zynq. This is not all that surprising, because the fact that Zynq "uses" PLAT_VERSATILE is secretly hidden in the Makefile. Nevertheless, the only feature from versatile that Zynq needed was the clock support, so this patch should *also* delete the secret use of plat-versatile by removing this line from arch/arm/Makefile: plat-$(CONFIG_ARCH_ZYNQ) += versatile Signed-off-by: Josh Cartwright Cc: John Linn Acked-by: Arnd Bergmann Tested-by: Michal Simek --- arch/arm/Kconfig | 1 - arch/arm/Makefile | 1 - arch/arm/mach-zynq/common.c | 1 - arch/arm/mach-zynq/include/mach/clkdev.h | 32 -------------------------------- 4 files changed, 35 deletions(-) delete mode 100644 arch/arm/mach-zynq/include/mach/clkdev.h (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ade7e924bef5..21ed87bc3503 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -959,7 +959,6 @@ config ARCH_ZYNQ bool "Xilinx Zynq ARM Cortex A9 Platform" select ARM_AMBA select ARM_GIC - select CLKDEV_LOOKUP select CPU_V7 select GENERIC_CLOCKEVENTS select ICST diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 5f914fca911b..554cfac41429 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -199,7 +199,6 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq plat-$(CONFIG_ARCH_MXC) += mxc plat-$(CONFIG_ARCH_OMAP) += omap plat-$(CONFIG_ARCH_S3C64XX) += samsung -plat-$(CONFIG_ARCH_ZYNQ) += versatile plat-$(CONFIG_PLAT_IOP) += iop plat-$(CONFIG_PLAT_NOMADIK) += nomadik plat-$(CONFIG_PLAT_ORION) += orion diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 056091a5a417..ba48f067d8f2 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -31,7 +31,6 @@ #include #include -#include #include "common.h" static struct of_device_id zynq_of_bus_ids[] __initdata = { diff --git a/arch/arm/mach-zynq/include/mach/clkdev.h b/arch/arm/mach-zynq/include/mach/clkdev.h deleted file mode 100644 index c6e73d81a459..000000000000 --- a/arch/arm/mach-zynq/include/mach/clkdev.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * arch/arm/mach-zynq/include/mach/clkdev.h - * - * Copyright (C) 2011 Xilinx, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_CLKDEV_H__ -#define __MACH_CLKDEV_H__ - -#include - -struct clk { - unsigned long rate; - const struct clk_ops *ops; - const struct icst_params *params; - void __iomem *vcoreg; -}; - -#define __clk_get(clk) ({ 1; }) -#define __clk_put(clk) do { } while (0) - -#endif -- cgit From f58007762f537ba13674a3138b3f4c20fff1cba9 Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Sun, 21 Oct 2012 21:15:37 -0500 Subject: zynq: move static peripheral mappings Shifting them up into the vmalloc region prevents the following warning, when booting a zynq qemu target with more than 512mb of RAM: BUG: mapping for 0xe0000000 at 0xe0000000 out of vmalloc space In addition, it allows for reuse of these mappings when the proper drivers issue requests via ioremap(). There are currently unknown issues with the early uart mapping. For now, the uart will be mapped to a known working address. Signed-off-by: Josh Cartwright Cc: John Linn Acked-by: Arnd Bergmann Tested-by: Michal Simek --- arch/arm/mach-zynq/common.c | 6 +++--- arch/arm/mach-zynq/include/mach/zynq_soc.h | 25 +++++++++++++++---------- 2 files changed, 18 insertions(+), 13 deletions(-) (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index ba48f067d8f2..ba8d14f78d4d 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -73,12 +73,12 @@ static struct map_desc io_desc[] __initdata = { { .virtual = TTC0_VIRT, .pfn = __phys_to_pfn(TTC0_PHYS), - .length = SZ_4K, + .length = TTC0_SIZE, .type = MT_DEVICE, }, { .virtual = SCU_PERIPH_VIRT, .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), - .length = SZ_8K, + .length = SCU_PERIPH_SIZE, .type = MT_DEVICE, }, @@ -86,7 +86,7 @@ static struct map_desc io_desc[] __initdata = { { .virtual = UART0_VIRT, .pfn = __phys_to_pfn(UART0_PHYS), - .length = SZ_4K, + .length = UART0_SIZE, .type = MT_DEVICE, }, #endif diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index 218283a94247..1b8bf0ecbcb0 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h @@ -15,27 +15,32 @@ #ifndef __MACH_XILINX_SOC_H__ #define __MACH_XILINX_SOC_H__ +#include + #define PERIPHERAL_CLOCK_RATE 2500000 -/* For now, all mappings are flat (physical = virtual) +/* Static peripheral mappings are mapped at the top of the vmalloc region. The + * early uart mapping causes intermediate problems/failure at certain + * addresses, including the very top of the vmalloc region. Map it at an + * address that is known to work. */ -#define UART0_PHYS 0xE0000000 -#define UART0_VIRT UART0_PHYS +#define UART0_PHYS 0xE0000000 +#define UART0_SIZE SZ_4K +#define UART0_VIRT 0xF0001000 -#define TTC0_PHYS 0xF8001000 -#define TTC0_VIRT TTC0_PHYS +#define TTC0_PHYS 0xF8001000 +#define TTC0_SIZE SZ_4K +#define TTC0_VIRT (VMALLOC_END - TTC0_SIZE) -#define SCU_PERIPH_PHYS 0xF8F00000 -#define SCU_PERIPH_VIRT SCU_PERIPH_PHYS +#define SCU_PERIPH_PHYS 0xF8F00000 +#define SCU_PERIPH_SIZE SZ_8K +#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE) /* The following are intended for the devices that are mapped early */ #define TTC0_BASE IOMEM(TTC0_VIRT) #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) -/* - * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical - */ #define LL_UART_PADDR UART0_PHYS #define LL_UART_VADDR UART0_VIRT -- cgit From 03e07595febc4857b2b6ad756826f369c7628ec8 Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Wed, 31 Oct 2012 11:11:59 -0600 Subject: ARM: zynq: move arm-specific sys_timer out of ttc Move the sys_timer definition out of ttc driver and make it part of the common zynq code. This is preparation for renaming and COMMON_CLK support. Signed-off-by: Josh Cartwright Tested-by: Michal Simek --- arch/arm/mach-zynq/common.c | 13 +++++++++++++ arch/arm/mach-zynq/common.h | 4 +--- arch/arm/mach-zynq/timer.c | 10 +--------- 3 files changed, 15 insertions(+), 12 deletions(-) (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index ba8d14f78d4d..6f058258b491 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -25,6 +25,7 @@ #include #include +#include #include #include #include @@ -93,6 +94,18 @@ static struct map_desc io_desc[] __initdata = { }; +static void __init xilinx_zynq_timer_init(void) +{ + xttcpss_timer_init(); +} + +/* + * Instantiate and initialize the system timer structure + */ +static struct sys_timer xttcpss_sys_timer = { + .init = xilinx_zynq_timer_init, +}; + /** * xilinx_map_io() - Create memory mappings needed for early I/O. */ diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index a009644a1555..954b91c13c91 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -17,8 +17,6 @@ #ifndef __MACH_ZYNQ_COMMON_H__ #define __MACH_ZYNQ_COMMON_H__ -#include - -extern struct sys_timer xttcpss_sys_timer; +void __init xttcpss_timer_init(void); #endif diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index c2c96cc7d6e7..c93cbe55a495 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c @@ -24,7 +24,6 @@ #include #include -#include #include #include "common.h" @@ -269,7 +268,7 @@ static struct clock_event_device xttcpss_clockevent = { * Initializes the timer hardware and register the clock source and clock event * timers with Linux kernal timer framework **/ -static void __init xttcpss_timer_init(void) +void __init xttcpss_timer_init(void) { xttcpss_timer_hardware_init(); clocksource_register_hz(&clocksource_xttcpss, TIMER_RATE); @@ -289,10 +288,3 @@ static void __init xttcpss_timer_init(void) xttcpss_clockevent.cpumask = cpumask_of(0); clockevents_register_device(&xttcpss_clockevent); } - -/* - * Instantiate and initialize the system timer structure - */ -struct sys_timer xttcpss_sys_timer = { - .init = xttcpss_timer_init, -}; -- cgit From aaf5e0be79e37d5a8509f09852788fa6a82522b2 Mon Sep 17 00:00:00 2001 From: Nick Bowler Date: Mon, 5 Nov 2012 16:45:49 -0500 Subject: ARM: zynq: Allow UART1 to be used as DEBUG_LL console. The main UART on the Xilinx ZC702 board is UART1, located at address e0001000. Add a Kconfig option to select this device as the low-level debugging port. This allows the really early boot printouts to reach the USB serial adaptor on this board. For consistency's sake, add a choice entry for UART0 even though it is the the default if UART1 is not selected. Signed-off-by: Nick Bowler Tested-by: Josh Cartwright Acked-by: Michal Simek --- arch/arm/Kconfig.debug | 17 +++++++++++++++++ arch/arm/mach-zynq/common.c | 6 +++--- arch/arm/mach-zynq/include/mach/zynq_soc.h | 16 +++++++++++----- 3 files changed, 31 insertions(+), 8 deletions(-) (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index b0f3857b3a4c..7754d51f2b19 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -132,6 +132,23 @@ choice their output to UART1 serial port on DaVinci TNETV107X devices. + config DEBUG_ZYNQ_UART0 + bool "Kernel low-level debugging on Xilinx Zynq using UART0" + depends on ARCH_ZYNQ + help + Say Y here if you want the debug print routines to direct + their output to UART0 on the Zynq platform. + + config DEBUG_ZYNQ_UART1 + bool "Kernel low-level debugging on Xilinx Zynq using UART1" + depends on ARCH_ZYNQ + help + Say Y here if you want the debug print routines to direct + their output to UART1 on the Zynq platform. + + If you have a ZC702 board and want early boot messages to + appear on the USB serial adaptor, select this option. + config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on FOOTBRIDGE diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 6f058258b491..f0eef848c0d0 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -85,9 +85,9 @@ static struct map_desc io_desc[] __initdata = { #ifdef CONFIG_DEBUG_LL { - .virtual = UART0_VIRT, - .pfn = __phys_to_pfn(UART0_PHYS), - .length = UART0_SIZE, + .virtual = LL_UART_VADDR, + .pfn = __phys_to_pfn(LL_UART_PADDR), + .length = UART_SIZE, .type = MT_DEVICE, }, #endif diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index 1b8bf0ecbcb0..5ebbd8e6eeee 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h @@ -25,8 +25,9 @@ * address that is known to work. */ #define UART0_PHYS 0xE0000000 -#define UART0_SIZE SZ_4K -#define UART0_VIRT 0xF0001000 +#define UART1_PHYS 0xE0001000 +#define UART_SIZE SZ_4K +#define UART_VIRT 0xF0001000 #define TTC0_PHYS 0xF8001000 #define TTC0_SIZE SZ_4K @@ -36,12 +37,17 @@ #define SCU_PERIPH_SIZE SZ_8K #define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE) +#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) +# define LL_UART_PADDR UART1_PHYS +#else +# define LL_UART_PADDR UART0_PHYS +#endif + +#define LL_UART_VADDR UART_VIRT + /* The following are intended for the devices that are mapped early */ #define TTC0_BASE IOMEM(TTC0_VIRT) #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) -#define LL_UART_PADDR UART0_PHYS -#define LL_UART_VADDR UART0_VIRT - #endif -- cgit From e06f1a9ed7ebff170ba05d2606d079fb36c6a52d Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Wed, 31 Oct 2012 12:24:48 -0600 Subject: ARM: zynq: dts: split up device tree The purpose of the created zynq-7000.dtsi file is to describe the hardware common to all Zynq 7000-based boards. Also, get rid of the zynq-ep107 device tree, since it is not hardware anyone can purchase. Add a zc702 dts file based on the zynq-7000.dtsi. Add it to the dts/Makefile so it is built with the 'dtbs' target. Signed-off-by: Josh Cartwright Acked-by: Michal Simek --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/zynq-7000.dtsi | 57 ++++++++++++++++++++++++++++++++ arch/arm/boot/dts/zynq-ep107.dts | 70 ---------------------------------------- arch/arm/boot/dts/zynq-zc702.dts | 30 +++++++++++++++++ arch/arm/mach-zynq/common.c | 3 +- 5 files changed, 90 insertions(+), 71 deletions(-) create mode 100644 arch/arm/boot/dts/zynq-7000.dtsi delete mode 100644 arch/arm/boot/dts/zynq-ep107.dts create mode 100644 arch/arm/boot/dts/zynq-zc702.dts (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f37cf9fa5fa0..76ed11e68f72 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -103,5 +103,6 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ wm8505-ref.dtb \ wm8650-mid.dtb +dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb endif diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi new file mode 100644 index 000000000000..8b30e596deab --- /dev/null +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2011 Xilinx + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +/include/ "skeleton.dtsi" + +/ { + compatible = "xlnx,zynq-7000"; + + amba { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + ranges; + + intc: interrupt-controller@f8f01000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; + interrupt-controller; + reg = <0xF8F01000 0x1000>, + <0xF8F00100 0x100>; + }; + + L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0xF8F02000 0x1000>; + arm,data-latency = <2 3 2>; + arm,tag-latency = <2 3 2>; + cache-unified; + cache-level = <2>; + }; + + uart0: uart@e0000000 { + compatible = "xlnx,xuartps"; + reg = <0xE0000000 0x1000>; + interrupts = <0 27 4>; + clock = <50000000>; + }; + + uart1: uart@e0001000 { + compatible = "xlnx,xuartps"; + reg = <0xE0001000 0x1000>; + interrupts = <0 50 4>; + clock = <50000000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts deleted file mode 100644 index 5caf10011f59..000000000000 --- a/arch/arm/boot/dts/zynq-ep107.dts +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; -/ { - model = "Xilinx Zynq EP107"; - compatible = "xlnx,zynq-ep107"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&intc>; - - memory { - device_type = "memory"; - reg = <0x0 0x10000000>; - }; - - chosen { - bootargs = "console=ttyPS0,9600 root=/dev/ram rw initrd=0x800000,8M earlyprintk"; - linux,stdout-path = &uart0; - }; - - amba { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - intc: interrupt-controller@f8f01000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <1>; - interrupt-controller; - reg = <0xF8F01000 0x1000>, - <0xF8F00100 0x100>; - }; - - L2: cache-controller { - compatible = "arm,pl310-cache"; - reg = <0xF8F02000 0x1000>; - arm,data-latency = <2 3 2>; - arm,tag-latency = <2 3 2>; - cache-unified; - cache-level = <2>; - }; - - uart0: uart@e0000000 { - compatible = "xlnx,xuartps"; - reg = <0xE0000000 0x1000>; - interrupts = <0 27 4>; - clock = <50000000>; - }; - - uart1: uart@e0001000 { - compatible = "xlnx,xuartps"; - reg = <0xE0001000 0x1000>; - interrupts = <0 50 4>; - clock = <50000000>; - }; - }; -}; diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts new file mode 100644 index 000000000000..e25a307438ad --- /dev/null +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2011 Xilinx + * Copyright (C) 2012 National Instruments Corp. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +/dts-v1/; +/include/ "zynq-7000.dtsi" + +/ { + model = "Zynq ZC702 Development Board"; + compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + chosen { + bootargs = "console=ttyPS1,115200 earlyprintk"; + }; + +}; diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index f0eef848c0d0..5441323e2a68 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -115,7 +115,8 @@ static void __init xilinx_map_io(void) } static const char *xilinx_dt_match[] = { - "xlnx,zynq-ep107", + "xlnx,zynq-zc702", + "xlnx,zynq-7000", NULL }; -- cgit From 0f586fbf6f6a9119392a5cb0f193ac11c753b09e Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Thu, 8 Nov 2012 12:04:26 -0600 Subject: ARM: zynq: use zynq clk bindings Make the Zynq platform use the newly created zynq clk bindings. Signed-off-by: Josh Cartwright Acked-by: Michal Simek --- arch/arm/Kconfig | 1 + arch/arm/boot/dts/zynq-7000.dtsi | 56 ++++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/zynq-zc702.dts | 4 +++ arch/arm/mach-zynq/common.c | 11 ++++++++ drivers/clk/Makefile | 1 + 5 files changed, 73 insertions(+) (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 21ed87bc3503..ccfe0ab8c877 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -959,6 +959,7 @@ config ARCH_ZYNQ bool "Xilinx Zynq ARM Cortex A9 Platform" select ARM_AMBA select ARM_GIC + select COMMON_CLK select CPU_V7 select GENERIC_CLOCKEVENTS select ICST diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 8b30e596deab..bb3085ca4f06 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -53,5 +53,61 @@ interrupts = <0 50 4>; clock = <50000000>; }; + + slcr: slcr@f8000000 { + compatible = "xlnx,zynq-slcr"; + reg = <0xF8000000 0x1000>; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + ps_clk: ps_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + /* clock-frequency set in board-specific file */ + clock-output-names = "ps_clk"; + }; + armpll: armpll { + #clock-cells = <0>; + compatible = "xlnx,zynq-pll"; + clocks = <&ps_clk>; + reg = <0x100 0x110>; + clock-output-names = "armpll"; + }; + ddrpll: ddrpll { + #clock-cells = <0>; + compatible = "xlnx,zynq-pll"; + clocks = <&ps_clk>; + reg = <0x104 0x114>; + clock-output-names = "ddrpll"; + }; + iopll: iopll { + #clock-cells = <0>; + compatible = "xlnx,zynq-pll"; + clocks = <&ps_clk>; + reg = <0x108 0x118>; + clock-output-names = "iopll"; + }; + uart_clk: uart_clk { + #clock-cells = <1>; + compatible = "xlnx,zynq-periph-clock"; + clocks = <&iopll &armpll &ddrpll>; + reg = <0x154>; + clock-output-names = "uart0_ref_clk", + "uart1_ref_clk"; + }; + cpu_clk: cpu_clk { + #clock-cells = <1>; + compatible = "xlnx,zynq-cpu-clock"; + clocks = <&iopll &armpll &ddrpll>; + reg = <0x120 0x1C4>; + clock-output-names = "cpu_6x4x", + "cpu_3x2x", + "cpu_2x", + "cpu_1x"; + }; + }; + }; }; }; diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index e25a307438ad..86f44d5b0265 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -28,3 +28,7 @@ }; }; + +&ps_clk { + clock-frequency = <33333330>; +}; diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 5441323e2a68..79bf5fb4dad3 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -19,6 +19,8 @@ #include #include #include +#include +#include #include #include #include @@ -96,6 +98,15 @@ static struct map_desc io_desc[] __initdata = { static void __init xilinx_zynq_timer_init(void) { + struct device_node *np; + void __iomem *slcr; + + np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); + slcr = of_iomap(np, 0); + WARN_ON(!slcr); + + xilinx_zynq_clocks_init(slcr); + xttcpss_timer_init(); } diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 71a25b91de00..d35a34c58369 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -19,6 +19,7 @@ endif obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o obj-$(CONFIG_ARCH_U8500) += ux500/ obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o +obj-$(CONFIG_ARCH_ZYNQ) += clk-zynq.o # Chip specific obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o -- cgit From 667f2988e2c11b25e79a46aff2f269696dbe8dc1 Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Mon, 19 Nov 2012 10:01:03 -0600 Subject: ARM: zynq: remove TTC early mapping Now that the TTC driver has proper support for DT bindings, it is not necessary for the registers to be mapped early. They will be mapped during clock initialization using of_iomap(). Remove the early mapping. In addition, remove the extraneous zynq_soc.h include from the timer driver. Signed-off-by: Josh Cartwright Tested-by: Michal Simek --- arch/arm/mach-zynq/common.c | 5 ----- arch/arm/mach-zynq/include/mach/zynq_soc.h | 6 +----- arch/arm/mach-zynq/timer.c | 1 - 3 files changed, 1 insertion(+), 11 deletions(-) (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 79bf5fb4dad3..2202f67c8a09 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -74,11 +74,6 @@ static void __init xilinx_irq_init(void) static struct map_desc io_desc[] __initdata = { { - .virtual = TTC0_VIRT, - .pfn = __phys_to_pfn(TTC0_PHYS), - .length = TTC0_SIZE, - .type = MT_DEVICE, - }, { .virtual = SCU_PERIPH_VIRT, .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), .length = SCU_PERIPH_SIZE, diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index 5ebbd8e6eeee..2995044682dc 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h @@ -29,13 +29,9 @@ #define UART_SIZE SZ_4K #define UART_VIRT 0xF0001000 -#define TTC0_PHYS 0xF8001000 -#define TTC0_SIZE SZ_4K -#define TTC0_VIRT (VMALLOC_END - TTC0_SIZE) - #define SCU_PERIPH_PHYS 0xF8F00000 #define SCU_PERIPH_SIZE SZ_8K -#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE) +#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) #if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) # define LL_UART_PADDR UART1_PHYS diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 9662306aa12f..de3df283da74 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c @@ -29,7 +29,6 @@ #include #include -#include #include "common.h" /* -- cgit From 385f02b1696004461d89589e69ae7247081a74a2 Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Mon, 19 Nov 2012 10:16:01 -0600 Subject: ARM: zynq: make use of debug_ll_io_init() Convert low-level debugging routines to make use of debug_ll_io_init(). This is part of the preparation for ARCH_MULTIPLATFORM support for Zynq. Signed-off-by: Josh Cartwright Tested-by: Michal Simek --- arch/arm/Kconfig.debug | 1 + arch/arm/include/debug/zynq.S | 35 ++++++++++++++++++++++++++ arch/arm/mach-zynq/common.c | 25 ++++++------------- arch/arm/mach-zynq/include/mach/debug-macro.S | 36 --------------------------- 4 files changed, 43 insertions(+), 54 deletions(-) create mode 100644 arch/arm/include/debug/zynq.S delete mode 100644 arch/arm/mach-zynq/include/mach/debug-macro.S (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 7754d51f2b19..d6bdad204d91 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -435,6 +435,7 @@ config DEBUG_LL_INCLUDE default "debug/socfpga.S" if DEBUG_SOCFPGA_UART default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \ DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1 + default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1 default "mach/debug-macro.S" config EARLY_PRINTK diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S new file mode 100644 index 000000000000..08aed97120e4 --- /dev/null +++ b/arch/arm/include/debug/zynq.S @@ -0,0 +1,35 @@ +/* + * Debugging macro include header + * + * Copyright (C) 2011 Xilinx + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + + .macro addruart, rp, rv, tmp + ldr \rp, =LL_UART_PADDR @ physical + ldr \rv, =LL_UART_VADDR @ virtual + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register + tst \rd, #UART_SR_TXFULL @ + bne 1002b @ wait if FIFO is full + .endm diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 2202f67c8a09..a2f48daa11ca 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -72,23 +72,11 @@ static void __init xilinx_irq_init(void) * running include the GIC, UART and Timer Counter. */ -static struct map_desc io_desc[] __initdata = { - { - .virtual = SCU_PERIPH_VIRT, - .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), - .length = SCU_PERIPH_SIZE, - .type = MT_DEVICE, - }, - -#ifdef CONFIG_DEBUG_LL - { - .virtual = LL_UART_VADDR, - .pfn = __phys_to_pfn(LL_UART_PADDR), - .length = UART_SIZE, - .type = MT_DEVICE, - }, -#endif - +static struct map_desc scu_desc __initdata = { + .virtual = SCU_PERIPH_VIRT, + .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), + .length = SCU_PERIPH_SIZE, + .type = MT_DEVICE, }; static void __init xilinx_zynq_timer_init(void) @@ -117,7 +105,8 @@ static struct sys_timer xttcpss_sys_timer = { */ static void __init xilinx_map_io(void) { - iotable_init(io_desc, ARRAY_SIZE(io_desc)); + debug_ll_io_init(); + iotable_init(&scu_desc, 1); } static const char *xilinx_dt_match[] = { diff --git a/arch/arm/mach-zynq/include/mach/debug-macro.S b/arch/arm/mach-zynq/include/mach/debug-macro.S deleted file mode 100644 index 3ab0be1f6191..000000000000 --- a/arch/arm/mach-zynq/include/mach/debug-macro.S +++ /dev/null @@ -1,36 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include - - .macro addruart, rp, rv, tmp - ldr \rp, =LL_UART_PADDR @ physical - ldr \rv, =LL_UART_VADDR @ virtual - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA - .endm - - .macro waituart,rd,rx - .endm - - .macro busyuart,rd,rx -1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register - tst \rd, #UART_SR_TXFULL @ - bne 1002b @ wait if FIFO is full - .endm -- cgit From 9a45eb691d8712b64a733178746557f708043444 Mon Sep 17 00:00:00 2001 From: Josh Cartwright Date: Mon, 19 Nov 2012 11:38:29 -0600 Subject: ARM: zynq: add support for ARCH_MULTIPLATFORM The majority of changes are necessary to remove dependencies on header files within arch/arm/mach-zynq/include/mach: uncompress.h - Deleted. It is unused for ARCH_MULTIPLATFORM builds. uart.h: - Move uart definitions out of uart.h into debug/zynq.S, which is now the only user zynq_soc.h: - Move SCU address definitions into common.c. - Other #defines, such as PERIPHERAL_CLOCK_RATE, TTC0_BASE, etc, are unused and can be dropped Signed-off-by: Josh Cartwright Tested-by: Michal Simek --- arch/arm/Kconfig | 14 ++------ arch/arm/include/debug/zynq.S | 20 +++++++++-- arch/arm/mach-zynq/Kconfig | 13 +++++++ arch/arm/mach-zynq/common.c | 8 ++--- arch/arm/mach-zynq/include/mach/uart.h | 25 -------------- arch/arm/mach-zynq/include/mach/uncompress.h | 51 ---------------------------- arch/arm/mach-zynq/include/mach/zynq_soc.h | 49 -------------------------- 7 files changed, 37 insertions(+), 143 deletions(-) create mode 100644 arch/arm/mach-zynq/Kconfig delete mode 100644 arch/arm/mach-zynq/include/mach/uart.h delete mode 100644 arch/arm/mach-zynq/include/mach/uncompress.h delete mode 100644 arch/arm/mach-zynq/include/mach/zynq_soc.h (limited to 'arch/arm/mach-zynq/common.c') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ccfe0ab8c877..28a204801ccf 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -955,18 +955,6 @@ config ARCH_VT8500 help Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. -config ARCH_ZYNQ - bool "Xilinx Zynq ARM Cortex A9 Platform" - select ARM_AMBA - select ARM_GIC - select COMMON_CLK - select CPU_V7 - select GENERIC_CLOCKEVENTS - select ICST - select MIGHT_HAVE_CACHE_L2X0 - select USE_OF - help - Support for Xilinx Zynq ARM Cortex A9 Platform endchoice menu "Multiple platform selection" @@ -1128,6 +1116,8 @@ source "arch/arm/plat-versatile/Kconfig" source "arch/arm/mach-w90x900/Kconfig" +source "arch/arm/mach-zynq/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S index 08aed97120e4..f9aa9740a73f 100644 --- a/arch/arm/include/debug/zynq.S +++ b/arch/arm/include/debug/zynq.S @@ -12,9 +12,25 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ +#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */ +#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */ +#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */ -#include -#include +#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */ +#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */ + +#define UART0_PHYS 0xE0000000 +#define UART1_PHYS 0xE0001000 +#define UART_SIZE SZ_4K +#define UART_VIRT 0xF0001000 + +#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) +# define LL_UART_PADDR UART1_PHYS +#else +# define LL_UART_PADDR UART0_PHYS +#endif + +#define LL_UART_VADDR UART_VIRT .macro addruart, rp, rv, tmp ldr \rp, =LL_UART_PADDR @ physical diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig new file mode 100644 index 000000000000..adb6c0ea0e53 --- /dev/null +++ b/arch/arm/mach-zynq/Kconfig @@ -0,0 +1,13 @@ +config ARCH_ZYNQ + bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7 + select ARM_AMBA + select ARM_GIC + select COMMON_CLK + select CPU_V7 + select GENERIC_CLOCKEVENTS + select ICST + select MIGHT_HAVE_CACHE_L2X0 + select USE_OF + select SPARSE_IRQ + help + Support for Xilinx Zynq ARM Cortex A9 Platform diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index a2f48daa11ca..e16d4bed0f7a 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -30,10 +30,10 @@ #include #include #include +#include #include #include -#include #include "common.h" static struct of_device_id zynq_of_bus_ids[] __initdata = { @@ -68,9 +68,9 @@ static void __init xilinx_irq_init(void) of_irq_init(irq_match); } -/* The minimum devices needed to be mapped before the VM system is up and - * running include the GIC, UART and Timer Counter. - */ +#define SCU_PERIPH_PHYS 0xF8F00000 +#define SCU_PERIPH_SIZE SZ_8K +#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) static struct map_desc scu_desc __initdata = { .virtual = SCU_PERIPH_VIRT, diff --git a/arch/arm/mach-zynq/include/mach/uart.h b/arch/arm/mach-zynq/include/mach/uart.h deleted file mode 100644 index 5c47c97156f3..000000000000 --- a/arch/arm/mach-zynq/include/mach/uart.h +++ /dev/null @@ -1,25 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/uart.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_UART_H__ -#define __MACH_UART_H__ - -#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */ -#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */ -#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */ - -#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */ -#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */ - -#endif diff --git a/arch/arm/mach-zynq/include/mach/uncompress.h b/arch/arm/mach-zynq/include/mach/uncompress.h deleted file mode 100644 index af4e8447bfa3..000000000000 --- a/arch/arm/mach-zynq/include/mach/uncompress.h +++ /dev/null @@ -1,51 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/uncompress.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_UNCOMPRESS_H__ -#define __MACH_UNCOMPRESS_H__ - -#include -#include -#include -#include - -void arch_decomp_setup(void) -{ -} - -static inline void flush(void) -{ - /* - * Wait while the FIFO is not empty - */ - while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) & - UART_SR_TXEMPTY)) - cpu_relax(); -} - -#define arch_decomp_wdog() - -static void putc(char ch) -{ - /* - * Wait for room in the FIFO, then write the char into the FIFO - */ - while (__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) & - UART_SR_TXFULL) - cpu_relax(); - - __raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET)); -} - -#endif diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h deleted file mode 100644 index 2995044682dc..000000000000 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ /dev/null @@ -1,49 +0,0 @@ -/* arch/arm/mach-zynq/include/mach/zynq_soc.h - * - * Copyright (C) 2011 Xilinx - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __MACH_XILINX_SOC_H__ -#define __MACH_XILINX_SOC_H__ - -#include - -#define PERIPHERAL_CLOCK_RATE 2500000 - -/* Static peripheral mappings are mapped at the top of the vmalloc region. The - * early uart mapping causes intermediate problems/failure at certain - * addresses, including the very top of the vmalloc region. Map it at an - * address that is known to work. - */ -#define UART0_PHYS 0xE0000000 -#define UART1_PHYS 0xE0001000 -#define UART_SIZE SZ_4K -#define UART_VIRT 0xF0001000 - -#define SCU_PERIPH_PHYS 0xF8F00000 -#define SCU_PERIPH_SIZE SZ_8K -#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) - -#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) -# define LL_UART_PADDR UART1_PHYS -#else -# define LL_UART_PADDR UART0_PHYS -#endif - -#define LL_UART_VADDR UART_VIRT - -/* The following are intended for the devices that are mapped early */ - -#define TTC0_BASE IOMEM(TTC0_VIRT) -#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) - -#endif -- cgit