From 9f7809c6a8824b7147595b3c36e633ffc81fe2ab Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Fri, 28 Jun 2024 12:55:41 +0200 Subject: dt-bindings: clock: mediatek: add syscon compatible for mt7622 pciesys Add required syscon compatible for mt7622 pciesys. This is required for SATA interface as the regs are shared. Signed-off-by: Christian Marangi Link: https://lore.kernel.org/r/20240628105542.5456-2-ansuelsmth@gmail.com Reviewed-by: Krzysztof Kozlowski Signed-off-by: Stephen Boyd --- .../devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml index c77111d10f90..9c3913f9092c 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml @@ -14,9 +14,11 @@ maintainers: properties: compatible: - enum: - - mediatek,mt7622-pciesys - - mediatek,mt7629-pciesys + oneOf: + - items: + - const: mediatek,mt7622-pciesys + - const: syscon + - const: mediatek,mt7629-pciesys reg: maxItems: 1 @@ -38,7 +40,7 @@ additionalProperties: false examples: - | clock-controller@1a100800 { - compatible = "mediatek,mt7622-pciesys"; + compatible = "mediatek,mt7622-pciesys", "syscon"; reg = <0x1a100800 0x1000>; #clock-cells = <1>; #reset-cells = <1>; -- cgit