From 2d7ee6989a3ba60607cf1708192d40618965f432 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Mon, 1 Feb 2021 17:30:49 +0800 Subject: arm64: dts: mediatek: mt8183: evb: Add domain supply for mfg Add domain supply node for mt8183-evb Signed-off-by: Hsin-Yi Wang Link: https://lore.kernel.org/r/20210201093049.87285-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts index 3249c959f76f..edff1e03e6fe 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts @@ -352,6 +352,10 @@ }; }; +&mfg { + domain-supply = <&mt6358_vgpu_reg>; +}; + &spi0 { pinctrl-names = "default"; pinctrl-0 = <&spi_pins_0>; -- cgit From d3cbc7f82caa9bebe058c7e2947405af39eb7ea6 Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Tue, 23 Mar 2021 15:02:55 +0800 Subject: arm64: dts: mt8183: update wakeup register offset Use wakeup control register offset exactly, and update revision number Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/1616482975-17841-13-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 80519a145f13..9ea84d636556 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -874,7 +874,7 @@ clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>, <&infracfg CLK_INFRA_USB>; clock-names = "sys_ck", "ref_ck"; - mediatek,syscon-wakeup = <&pericfg 0x400 0>; + mediatek,syscon-wakeup = <&pericfg 0x420 101>; #address-cells = <2>; #size-cells = <2>; ranges; -- cgit From 02e744a11a014db4666aea5488a5754e332b84c4 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Fri, 19 Mar 2021 11:52:42 +0800 Subject: dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-damu mt8183-kukui-jacuzzi-damu board also known as ASUS Chromebook Flip CM3, using mediatek mt8183 SoC. Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210319035245.2751911-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 93b3bdf6eaeb..a86716cdd408 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -125,6 +125,10 @@ properties: - google,krane-sku176 - const: google,krane - const: mediatek,mt8183 + - description: Google Damu (ASUS Chromebook Flip CM3) + items: + - const: google,damu + - const: mediatek,mt8183 additionalProperties: true -- cgit From c60dd29e2d11ee99fbfd27804e2d696de409c82f Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Fri, 19 Mar 2021 11:52:43 +0800 Subject: dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-juniper mt8183-kukui-jacuzzi-juniper board also known as Acer Chromebook Spin 311, using mediatek mt8183 SoC. Signed-off-by: Hsin-Yi Wang Reviewed-by: Enric Balletbo i Serra Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210319035245.2751911-2-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index a86716cdd408..edee2c3f8620 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -129,6 +129,11 @@ properties: items: - const: google,damu - const: mediatek,mt8183 + - description: Google Juniper (Acer Chromebook Spin 311) + items: + - const: google,juniper-sku16 + - const: google,juniper + - const: mediatek,mt8183 additionalProperties: true -- cgit From cabc71b08eb597c53e6c6a988027df4b5a6903de Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Fri, 19 Mar 2021 11:52:44 +0800 Subject: arm64: dts: mt8183: Add kukui-jacuzzi-damu board Damu is known as ASUS Chromebook Flip CM3. Signed-off-by: Hsin-Yi Wang Link: https://lore.kernel.org/r/20210319035245.2751911-3-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/Makefile | 1 + .../dts/mediatek/mt8183-kukui-jacuzzi-damu.dts | 31 ++ .../boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi | 474 +++++++++++++++++++++ 3 files changed, 506 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index deba27ab7657..554105d2c389 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts new file mode 100644 index 000000000000..42ba9c00866c --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Google LLC + */ + +/dts-v1/; +#include "mt8183-kukui-jacuzzi.dtsi" + +/ { + model = "Google damu board"; + compatible = "google,damu", "mediatek,mt8183"; +}; + +&touchscreen { + status = "okay"; + + compatible = "hid-over-i2c"; + reg = <0x10>; + interrupt-parent = <&pio>; + interrupts = <155 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins>; + + post-power-on-delay-ms = <10>; + hid-descr-addr = <0x0001>; +}; + +&qca_wifi { + qcom,ath10k-calibration-variant = "GO_DAMU"; +}; + diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi new file mode 100644 index 000000000000..4049dff8464b --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi @@ -0,0 +1,474 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Google LLC + */ + +#include "mt8183-kukui.dtsi" + +/ { + panel: panel { + compatible = "auo,b116xw03"; + power-supply = <&pp3300_panel>; + ddc-i2c-bus = <&i2c4>; + backlight = <&backlight_lcd0>; + + port { + panel_in: endpoint { + remote-endpoint = <&anx7625_out>; + }; + }; + }; + + pp1200_mipibrdg: pp1200-mipibrdg { + compatible = "regulator-fixed"; + regulator-name = "pp1200_mipibrdg"; + pinctrl-names = "default"; + pinctrl-0 = <&pp1200_mipibrdg_en>; + + enable-active-high; + regulator-boot-on; + + gpio = <&pio 54 GPIO_ACTIVE_HIGH>; + }; + + pp1800_mipibrdg: pp1800-mipibrdg { + compatible = "regulator-fixed"; + regulator-name = "pp1800_mipibrdg"; + pinctrl-names = "default"; + pinctrl-0 = <&pp1800_lcd_en>; + + enable-active-high; + regulator-boot-on; + + gpio = <&pio 36 GPIO_ACTIVE_HIGH>; + }; + + pp3300_panel: pp3300-panel { + compatible = "regulator-fixed"; + regulator-name = "pp3300_panel"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-names = "default"; + pinctrl-0 = <&pp3300_panel_pins>; + + enable-active-high; + regulator-boot-on; + + gpio = <&pio 35 GPIO_ACTIVE_HIGH>; + }; + + vddio_mipibrdg: vddio-mipibrdg { + compatible = "regulator-fixed"; + regulator-name = "vddio_mipibrdg"; + pinctrl-names = "default"; + pinctrl-0 = <&vddio_mipibrdg_en>; + + enable-active-high; + regulator-boot-on; + + gpio = <&pio 37 GPIO_ACTIVE_HIGH>; + }; + + volume_buttons: volume-buttons { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&volume_button_pins>; + + volume_down { + label = "Volume Down"; + linux,code = ; + debounce-interval = <100>; + + gpios = <&pio 6 GPIO_ACTIVE_LOW>; + }; + + volume_up { + label = "Volume Up"; + linux,code = ; + debounce-interval = <100>; + + gpios = <&pio 5 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&dsi0 { + status = "okay"; + /delete-node/panel@0; + ports { + port { + dsi_out: endpoint { + remote-endpoint = <&anx7625_in>; + }; + }; + }; +}; + +&i2c0 { + status = "okay"; + + touchscreen: touchscreen@10 { + compatible = "elan,ekth3500"; + reg = <0x10>; + + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins>; + + interrupts-extended = <&pio 155 IRQ_TYPE_LEVEL_LOW>; + + reset-gpios = <&pio 156 GPIO_ACTIVE_LOW>; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; + clock-frequency = <400000>; + + trackpad@15 { + compatible = "elan,ekth3000"; + reg = <0x15>; + + pinctrl-names = "default"; + pinctrl-0 = <&trackpad_pins>; + + interrupts-extended = <&pio 7 IRQ_TYPE_LEVEL_LOW>; + + wakeup-source; + }; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + status = "okay"; + clock-frequency = <100000>; + + anx_bridge: anx7625@58 { + compatible = "analogix,anx7625"; + reg = <0x58>; + pinctrl-names = "default"; + pinctrl-0 = <&anx7625_pins>; + panel_flags = <1>; + enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; + vdd10-supply = <&pp1200_mipibrdg>; + vdd18-supply = <&pp1800_mipibrdg>; + vdd33-supply = <&vddio_mipibrdg>; + + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + + anx7625_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + + port@1 { + reg = <1>; + + anx7625_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; +}; + +&i2c_tunnel { + google,remote-bus = <2>; +}; + +&pio { + /* 192 lines */ + gpio-line-names = + "SPI_AP_EC_CS_L", + "SPI_AP_EC_MOSI", + "SPI_AP_EC_CLK", + "I2S3_DO", + "USB_PD_INT_ODL", + "", + "", + "", + "", + "IT6505_HPD_L", + "I2S3_TDM_D3", + "SOC_I2C6_1V8_SCL", + "SOC_I2C6_1V8_SDA", + "DPI_D0", + "DPI_D1", + "DPI_D2", + "DPI_D3", + "DPI_D4", + "DPI_D5", + "DPI_D6", + "DPI_D7", + "DPI_D8", + "DPI_D9", + "DPI_D10", + "DPI_D11", + "DPI_HSYNC", + "DPI_VSYNC", + "DPI_DE", + "DPI_CK", + "AP_MSDC1_CLK", + "AP_MSDC1_DAT3", + "AP_MSDC1_CMD", + "AP_MSDC1_DAT0", + "AP_MSDC1_DAT2", + "AP_MSDC1_DAT1", + "", + "", + "", + "", + "", + "", + "OTG_EN", + "DRVBUS", + "DISP_PWM", + "DSI_TE", + "LCM_RST_1V8", + "AP_CTS_WIFI_RTS", + "AP_RTS_WIFI_CTS", + "SOC_I2C5_1V8_SCL", + "SOC_I2C5_1V8_SDA", + "SOC_I2C3_1V8_SCL", + "SOC_I2C3_1V8_SDA", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SOC_I2C1_1V8_SDA", + "SOC_I2C0_1V8_SDA", + "SOC_I2C0_1V8_SCL", + "SOC_I2C1_1V8_SCL", + "AP_SPI_H1_MISO", + "AP_SPI_H1_CS_L", + "AP_SPI_H1_MOSI", + "AP_SPI_H1_CLK", + "I2S5_BCK", + "I2S5_LRCK", + "I2S5_DO", + "BOOTBLOCK_EN_L", + "MT8183_KPCOL0", + "SPI_AP_EC_MISO", + "UART_DBG_TX_AP_RX", + "UART_AP_TX_DBG_RX", + "I2S2_MCK", + "I2S2_BCK", + "CLK_5M_WCAM", + "CLK_2M_UCAM", + "I2S2_LRCK", + "I2S2_DI", + "SOC_I2C2_1V8_SCL", + "SOC_I2C2_1V8_SDA", + "SOC_I2C4_1V8_SCL", + "SOC_I2C4_1V8_SDA", + "", + "SCL8", + "SDA8", + "FCAM_PWDN_L", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "", + "", + "", + "", + "", + "", + /* + * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics + * call it BIOS_FLASH_WP_R_L. + */ + "AP_FLASH_WP_L", + "EC_AP_INT_ODL", + "IT6505_INT_ODL", + "H1_INT_OD_L", + "", + "", + "", + "", + "", + "", + "", + "AP_SPI_FLASH_MISO", + "AP_SPI_FLASH_CS_L", + "AP_SPI_FLASH_MOSI", + "AP_SPI_FLASH_CLK", + "DA7219_IRQ", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + ""; + + pp1200_mipibrdg_en: pp1200-mipibrdg-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + pp1800_lcd_en: pp1800-lcd-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + pp3300_panel_pins: pp3300-panel-pins { + panel_3v3_enable: panel-3v3-enable { + pinmux = ; + output-low; + }; + }; + + ppvarp_lcd_en: ppvarp-lcd-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + ppvarn_lcd_en: ppvarn-lcd-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + anx7625_pins: anx7625-pins { + pins1 { + pinmux = , + ; + output-low; + }; + pins2 { + pinmux = ; + input-enable; + bias-pull-up; + }; + }; + + touchscreen_pins: touchscreen-pins { + touch_int_odl { + pinmux = ; + input-enable; + bias-pull-up; + }; + + touch_rst_l { + pinmux = ; + output-high; + }; + }; + + trackpad_pins: trackpad-pins { + trackpad_int { + pinmux = ; + input-enable; + bias-disable; /* pulled externally */ + }; + }; + + vddio_mipibrdg_en: vddio-mipibrdg-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + volume_button_pins: volume-button-pins { + voldn-btn-odl { + pinmux = ; + input-enable; + bias-pull-up; + }; + + volup-btn-odl { + pinmux = ; + input-enable; + bias-pull-up; + }; + }; +}; + -- cgit From 124d64392de21db356a30051bb2f9d167a111f06 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Fri, 19 Mar 2021 11:52:45 +0800 Subject: arm64: dts: mt8183: Add kukui-jacuzzi-juniper board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Juniper is known as Acer Chromebook Spin 311 (CP311-3H). Signed-off-by: Hsin-Yi Wang Tested-by: Ricardo Cañuelo Link: https://lore.kernel.org/r/20210319035245.2751911-4-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/Makefile | 1 + .../mt8183-kukui-jacuzzi-juniper-sku16.dts | 13 +++++++++++ .../dts/mediatek/mt8183-kukui-jacuzzi-juniper.dtsi | 27 ++++++++++++++++++++++ 3 files changed, 41 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 554105d2c389..db4753d82a4b 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -14,6 +14,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dts new file mode 100644 index 000000000000..36d2c3b3cadf --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Google LLC + */ + +/dts-v1/; +#include "mt8183-kukui-jacuzzi-juniper.dtsi" + +/ { + model = "Google juniper sku16 board"; + compatible = "google,juniper-sku16", "google,juniper", "mediatek,mt8183"; +}; + diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper.dtsi new file mode 100644 index 000000000000..078bc765646f --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-juniper.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Google LLC + */ + +/dts-v1/; +#include "mt8183-kukui-jacuzzi.dtsi" + +&i2c2 { + trackpad@2c { + compatible = "hid-over-i2c"; + reg = <0x2c>; + hid-descr-addr = <0x20>; + + pinctrl-names = "default"; + pinctrl-0 = <&trackpad_pins>; + + interrupts-extended = <&pio 7 IRQ_TYPE_LEVEL_LOW>; + + wakeup-source; + }; +}; + +&qca_wifi { + qcom,ath10k-calibration-variant = "GO_JUNIPER"; +}; + -- cgit From ac75c32e821b7f4fbfbe44b502c1d86498809301 Mon Sep 17 00:00:00 2001 From: Seiya Wang Date: Fri, 19 Mar 2021 10:34:20 +0800 Subject: dt-bindings: timer: Add compatible for Mediatek MT8195 This commit adds dt-binding documentation of timer for Mediatek MT8195 SoC Platform. Signed-off-by: Seiya Wang Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210319023427.16711-3-seiya.wang@mediatek.com Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt index 690a9c0966ac..e5c57d6e0186 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt +++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt @@ -23,6 +23,7 @@ Required properties: For those SoCs that use SYST * "mediatek,mt8183-timer" for MT8183 compatible timers (SYST) * "mediatek,mt8192-timer" for MT8192 compatible timers (SYST) + * "mediatek,mt8195-timer" for MT8195 compatible timers (SYST) * "mediatek,mt7629-timer" for MT7629 compatible timers (SYST) * "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST) -- cgit From 8c7713c00488bf3ac067db3e9a203e8d1ef3613b Mon Sep 17 00:00:00 2001 From: Seiya Wang Date: Fri, 19 Mar 2021 10:34:21 +0800 Subject: dt-bindings: serial: Add compatible for Mediatek MT8195 This commit adds dt-binding documentation of uart for Mediatek MT8195 SoC Platform. Signed-off-by: Seiya Wang Link: https://lore.kernel.org/r/20210319023427.16711-4-seiya.wang@mediatek.com Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index 647b5aee86f3..64c4fb59acd1 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -20,6 +20,7 @@ Required properties: * "mediatek,mt8173-uart" for MT8173 compatible UARTS * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS * "mediatek,mt8192-uart", "mediatek,mt6577-uart" for MT8192 compatible UARTS + * "mediatek,mt8195-uart", "mediatek,mt6577-uart" for MT8195 compatible UARTS * "mediatek,mt8516-uart" for MT8516 compatible UARTS * "mediatek,mt6577-uart" for MT6577 and all of the above -- cgit From 13225a5c7b1c3680068722b53d85b51722b09b80 Mon Sep 17 00:00:00 2001 From: Seiya Wang Date: Fri, 19 Mar 2021 10:34:25 +0800 Subject: dt-bindings: arm: Add compatible for Mediatek MT8195 This commit adds dt-binding documentation for the Mediatek MT8195 reference board. Signed-off-by: Seiya Wang Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210319023427.16711-8-seiya.wang@mediatek.com Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index edee2c3f8620..cf24401edb85 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -118,6 +118,10 @@ properties: - enum: - mediatek,mt8183-evb - const: mediatek,mt8183 + - items: + - enum: + - mediatek,mt8195-evb + - const: mediatek,mt8195 - description: Google Krane (Lenovo IdeaPad Duet, 10e,...) items: - enum: -- cgit From e4e5d030bd779fb8321d3b8bd65406fbe0827037 Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Tue, 16 Mar 2021 17:22:24 +0800 Subject: arm64: dts: mt8173: fix property typo of 'phys' in dsi node Use 'phys' instead of 'phy'. Fixes: 81ad4dbaf7af ("arm64: dts: mt8173: Add display subsystem related nodes") Signed-off-by: Chunfeng Yun Reviewed-by: Chun-Kuang Hu Cc: stable Link: https://lore.kernel.org/r/20210316092232.9806-5-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 7fa870e4386a..ecb37a7e6870 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -1235,7 +1235,7 @@ <&mmsys CLK_MM_DSI1_DIGITAL>, <&mipi_tx1>; clock-names = "engine", "digital", "hs"; - phy = <&mipi_tx1>; + phys = <&mipi_tx1>; phy-names = "dphy"; status = "disabled"; }; -- cgit From c61872d5cc44510c1b4dd3955d7d34d96a4d3e8a Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Tue, 16 Mar 2021 17:22:25 +0800 Subject: arm64: dts: mediatek: mt8173: fix dtbs_check warning Harmonize nodes names, compatibles and remove unused property. Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/20210316092232.9806-6-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 4 +--- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 13 +++++++------ 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts index 6dffada2e66b..0ce81c4fe81e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts @@ -516,10 +516,8 @@ extcon = <&extcon_usb>; dr_mode = "otg"; wakeup-source; - pinctrl-names = "default", "id_float", "id_ground"; + pinctrl-names = "default"; pinctrl-0 = <&usb_id_pins_float>; - pinctrl-1 = <&usb_id_pins_float>; - pinctrl-2 = <&usb_id_pins_ground>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index ecb37a7e6870..003a5653c505 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -631,7 +631,7 @@ #mbox-cells = <2>; }; - mipi_tx0: mipi-dphy@10215000 { + mipi_tx0: dsi-phy@10215000 { compatible = "mediatek,mt8173-mipi-tx"; reg = <0 0x10215000 0 0x1000>; clocks = <&clk26m>; @@ -641,7 +641,7 @@ status = "disabled"; }; - mipi_tx1: mipi-dphy@10216000 { + mipi_tx1: dsi-phy@10216000 { compatible = "mediatek,mt8173-mipi-tx"; reg = <0 0x10216000 0 0x1000>; clocks = <&clk26m>; @@ -926,7 +926,7 @@ }; ssusb: usb@11271000 { - compatible = "mediatek,mt8173-mtu3"; + compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3"; reg = <0 0x11271000 0 0x3000>, <0 0x11280700 0 0x0100>; reg-names = "mac", "ippc"; @@ -943,8 +943,9 @@ ranges; status = "disabled"; - usb_host: xhci@11270000 { - compatible = "mediatek,mt8173-xhci"; + usb_host: usb@11270000 { + compatible = "mediatek,mt8173-xhci", + "mediatek,mtk-xhci"; reg = <0 0x11270000 0 0x1000>; reg-names = "mac"; interrupts = ; @@ -955,7 +956,7 @@ }; }; - u3phy: usb-phy@11290000 { + u3phy: t-phy@11290000 { compatible = "mediatek,mt8173-u3phy"; reg = <0 0x11290000 0 0x800>; #address-cells = <2>; -- cgit From 357c5f717ea4e35c11eb1f0e948e2ea2662d1ce0 Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Tue, 16 Mar 2021 17:22:26 +0800 Subject: arm64: dts: mediatek: mt2712: harmonize node names This is used to fix dtbs_check warning. Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/20210316092232.9806-7-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index db17d0a4ed57..a9cca9c146fd 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -805,7 +805,7 @@ ranges; status = "disabled"; - usb_host0: xhci@11270000 { + usb_host0: usb@11270000 { compatible = "mediatek,mt2712-xhci", "mediatek,mtk-xhci"; reg = <0 0x11270000 0 0x1000>; @@ -818,7 +818,7 @@ }; }; - u3phy0: usb-phy@11290000 { + u3phy0: t-phy@11290000 { compatible = "mediatek,mt2712-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>; @@ -869,7 +869,7 @@ ranges; status = "disabled"; - usb_host1: xhci@112c0000 { + usb_host1: usb@112c0000 { compatible = "mediatek,mt2712-xhci", "mediatek,mtk-xhci"; reg = <0 0x112c0000 0 0x1000>; @@ -882,7 +882,7 @@ }; }; - u3phy1: usb-phy@112e0000 { + u3phy1: t-phy@112e0000 { compatible = "mediatek,mt2712-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>; -- cgit From 86c5ed12cf729abda5a9166cc32abd0a7208cd1f Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Tue, 16 Mar 2021 17:22:27 +0800 Subject: arm64: dts: mediatek: mt8516: harmonize node names and compatibles This is used to fix dtbs_check warning: harmonize node names and compatibles; add property "usb-role-switch" for connector dependence. Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/20210316092232.9806-8-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8516.dtsi | 9 +++++---- arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi | 1 + 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi index b80e95574bef..bbe5a1419eff 100644 --- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi @@ -480,7 +480,7 @@ }; usb0: usb@11100000 { - compatible = "mediatek,mtk-musb"; + compatible = "mediatek,mt8516-musb", "mediatek,mtk-musb"; reg = <0 0x11100000 0 0x1000>; interrupts = ; interrupt-names = "mc"; @@ -493,7 +493,7 @@ }; usb1: usb@11190000 { - compatible = "mediatek,mtk-musb"; + compatible = "mediatek,mt8516-musb", "mediatek,mtk-musb"; reg = <0 0x11190000 0 0x1000>; interrupts = ; interrupt-names = "mc"; @@ -506,8 +506,9 @@ status = "disabled"; }; - usb_phy: usb@11110000 { - compatible = "mediatek,generic-tphy-v1"; + usb_phy: t-phy@11110000 { + compatible = "mediatek,mt8516-tphy", + "mediatek,generic-tphy-v1"; reg = <0 0x11110000 0 0x800>; #address-cells = <2>; #size-cells = <2>; diff --git a/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi b/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi index 63fd70086bb8..7d738f01cf8d 100644 --- a/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi +++ b/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi @@ -188,6 +188,7 @@ &usb0 { status = "okay"; dr_mode = "peripheral"; + usb-role-switch; usb_con: connector { compatible = "usb-c-connector"; -- cgit From 6029cae696c8344f3fcfe9f0f76f736bc415af03 Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Tue, 16 Mar 2021 17:22:28 +0800 Subject: arm64: dts: mediatek: mt7622: harmonize node names and compatibles This is used to fix dtbs_check warning Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/20210316092232.9806-9-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 7c6d871538a6..890a942ec608 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -742,8 +742,8 @@ status = "disabled"; }; - u3phy: usb-phy@1a0c4000 { - compatible = "mediatek,mt7622-u3phy", + u3phy: t-phy@1a0c4000 { + compatible = "mediatek,mt7622-tphy", "mediatek,generic-tphy-v1"; reg = <0 0x1a0c4000 0 0x700>; #address-cells = <2>; @@ -877,8 +877,9 @@ status = "disabled"; }; - sata_phy: sata-phy@1a243000 { - compatible = "mediatek,generic-tphy-v1"; + sata_phy: t-phy@1a243000 { + compatible = "mediatek,mt7622-tphy", + "mediatek,generic-tphy-v1"; #address-cells = <2>; #size-cells = <2>; ranges; -- cgit From d1c9c70a88232104aa8686e3cb7742e5260a3062 Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Tue, 16 Mar 2021 17:22:29 +0800 Subject: arm64: dts: mediatek: mt8183: fix dtbs_check warning Harmonize node names, compatibles and properties. Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/20210316092232.9806-10-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 9ea84d636556..fcf825244d3f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -880,7 +880,7 @@ ranges; status = "disabled"; - usb_host: xhci@11200000 { + usb_host: usb@11200000 { compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci"; reg = <0 0x11200000 0 0x1000>; @@ -923,11 +923,10 @@ status = "disabled"; }; - mipi_tx0: mipi-dphy@11e50000 { + mipi_tx0: dsi-phy@11e50000 { compatible = "mediatek,mt8183-mipi-tx"; reg = <0 0x11e50000 0 0x1000>; clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>; - clock-names = "ref_clk"; #clock-cells = <0>; #phy-cells = <0>; clock-output-names = "mipi_tx0_pll"; @@ -946,11 +945,10 @@ }; }; - u3phy: usb-phy@11f40000 { + u3phy: t-phy@11f40000 { compatible = "mediatek,mt8183-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>; - #phy-cells = <1>; #size-cells = <1>; ranges = <0 0 0x11f40000 0x1000>; status = "okay"; -- cgit From b7a8f50a1437164607f73831075c06120aa1f3b3 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Wed, 24 Mar 2021 15:08:42 +0800 Subject: arm64: dts: mt8183: Add gce client reg for display subcomponents Add mediatek,gce-client-reg for mmsys, ccorr, aal, gamma, dither. Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Signed-off-by: Hsin-Yi Wang Tested-by: Enric Balletbo i Serra Link: https://lore.kernel.org/r/20210324070842.1037233-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index fcf825244d3f..b5ca610d9f69 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -981,6 +981,9 @@ compatible = "mediatek,mt8183-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, + <&gce 1 CMDQ_THR_PRIO_HIGHEST>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; }; ovl0: ovl@14008000 { @@ -1056,6 +1059,7 @@ interrupts = ; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_CCORR0>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>; }; aal0: aal@14010000 { @@ -1065,6 +1069,7 @@ interrupts = ; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_AAL0>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0 0x1000>; }; gamma0: gamma@14011000 { @@ -1073,6 +1078,7 @@ interrupts = ; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_GAMMA0>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>; }; dither0: dither@14012000 { @@ -1081,6 +1087,7 @@ interrupts = ; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; clocks = <&mmsys CLK_MM_DISP_DITHER0>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>; }; dsi0: dsi@14014000 { -- cgit From b325ce39785b1408040d90365a6ab1aa36e94f87 Mon Sep 17 00:00:00 2001 From: "michael.kao" Date: Tue, 16 Mar 2021 15:01:42 +0800 Subject: arm64: dts: mt8183: add thermal zone node Add thermal zone node to Mediatek MT8183 dts file. Evaluate the thermal zone every 500ms while not cooling and every 100ms when passive cooling is performed. Signed-off-by: Matthias Kaehlcke Tested-by: Hsin-Yi Wang Signed-off-by: Michael Kao Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index b5ca610d9f69..e4a6b625980d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -657,6 +657,87 @@ status = "disabled"; }; + thermal: thermal@1100b000 { + #thermal-sensor-cells = <1>; + compatible = "mediatek,mt8183-thermal"; + reg = <0 0x1100b000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_THERM>, + <&infracfg CLK_INFRA_AUXADC>; + clock-names = "therm", "auxadc"; + resets = <&infracfg MT8183_INFRACFG_AO_THERM_SW_RST>; + interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>; + mediatek,auxadc = <&auxadc>; + mediatek,apmixedsys = <&apmixedsys>; + nvmem-cells = <&thermal_calibration>; + nvmem-cell-names = "calibration-data"; + }; + + thermal-zones { + cpu_thermal: cpu_thermal { + polling-delay-passive = <100>; + polling-delay = <500>; + thermal-sensors = <&thermal 0>; + sustainable-power = <5000>; + }; + + /* The tzts1 ~ tzts6 don't need to polling */ + /* The tzts1 ~ tzts6 don't need to thermal throttle */ + + tzts1: tzts1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&thermal 1>; + sustainable-power = <5000>; + trips {}; + cooling-maps {}; + }; + + tzts2: tzts2 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&thermal 2>; + sustainable-power = <5000>; + trips {}; + cooling-maps {}; + }; + + tzts3: tzts3 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&thermal 3>; + sustainable-power = <5000>; + trips {}; + cooling-maps {}; + }; + + tzts4: tzts4 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&thermal 4>; + sustainable-power = <5000>; + trips {}; + cooling-maps {}; + }; + + tzts5: tzts5 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&thermal 5>; + sustainable-power = <5000>; + trips {}; + cooling-maps {}; + }; + + tztsABB: tztsABB { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&thermal 6>; + sustainable-power = <5000>; + trips {}; + cooling-maps {}; + }; + }; + pwm0: pwm@1100e000 { compatible = "mediatek,mt8183-disp-pwm"; reg = <0 0x1100e000 0 0x1000>; @@ -940,6 +1021,10 @@ reg = <0 0x11f10000 0 0x1000>; #address-cells = <1>; #size-cells = <1>; + thermal_calibration: calib@180 { + reg = <0x180 0xc>; + }; + mipi_tx_calibration: calib@190 { reg = <0x190 0xc>; }; -- cgit From fccf4261b82ef9c8dea348ad51e7fba8b1127409 Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Mon, 29 Mar 2021 19:10:37 +0200 Subject: arm64: dts: mt8183: Configure CPU cooling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add two passive trip points at 68°C and 80°C for the CPU temperature. Signed-off-by: Matthias Kaehlcke Signed-off-by: Michael Kao Tested-by: Hsin-Yi Wang Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 56 ++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index e4a6b625980d..0ff7b67a6806 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include #include "mt8183-pinfunc.h" / { @@ -678,6 +679,61 @@ polling-delay = <500>; thermal-sensors = <&thermal 0>; sustainable-power = <5000>; + + trips { + threshold: trip-point@0 { + temperature = <68000>; + hysteresis = <2000>; + type = "passive"; + }; + + target: trip-point@1 { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit: cpu-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&cpu0 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu1 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu2 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu3 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + contribution = <3072>; + }; + map1 { + trip = <&target>; + cooling-device = <&cpu4 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu5 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu6 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu7 + THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; }; /* The tzts1 ~ tzts6 don't need to polling */ -- cgit From 4db2b9af3ee92e6c51c6a9a5dc2748e4bc1800f9 Mon Sep 17 00:00:00 2001 From: Chunfeng Yun Date: Thu, 18 Mar 2021 14:18:48 +0800 Subject: arm64: dts: mt8173: fix wrong power-domain phandle of pmic Due to power domain controller is added, the power domain's phanle is also changed from 'scpsys' to 'spm', but forget to modify pmic node's Fixes: 8b6562644df9 ("arm64: dts: mediatek: Add mt8173 power domain controller") Signed-off-by: Chunfeng Yun Reviewed-by: Enric Balletbo i Serra Link: https://lore.kernel.org/r/1616048328-13579-1-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts index 0ce81c4fe81e..f6a1738dfbaa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts @@ -294,7 +294,7 @@ &pwrap { /* Only MT8173 E1 needs USB power domain */ - power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; + power-domains = <&spm MT8173_POWER_DOMAIN_USB>; pmic: mt6397 { compatible = "mediatek,mt6397"; -- cgit From f2674c0c748811e21b2c15b62951b2e21812ed01 Mon Sep 17 00:00:00 2001 From: Ryan Wu Date: Mon, 1 Feb 2021 11:59:45 +0800 Subject: dt-bindings: nvmem: mediatek: add support for MediaTek mt8192 SoC This updates dt-binding documentation for MediaTek mt8192 Signed-off-by: Ryan Wu Acked-by: Rob Herring Link: https://lore.kernel.org/r/1612151986-19820-2-git-send-email-Yz.Wu@mediatek.com Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/nvmem/mtk-efuse.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt b/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt index ef93c3b95424..b6791702bcfc 100644 --- a/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt +++ b/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt @@ -7,6 +7,7 @@ Required properties: "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622 "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623 "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173 + "mediatek,mt8192-efuse", "mediatek,efuse": for MT8192 "mediatek,mt8516-efuse", "mediatek,efuse": for MT8516 - reg: Should contain registers location and length -- cgit From 0da34906a9daadc1c3dacbaed051e5e0188939c3 Mon Sep 17 00:00:00 2001 From: Ryder Lee Date: Tue, 30 Mar 2021 01:24:48 +0800 Subject: arm64: dts: mt7622: add ePA/eLNA pinmux for built-in WiFi This just illustrates one of possible combinations. User should setup the corresponding pins according to the onboard RF data that stores in eeprom. Signed-off-by: Ryder Lee Link: https://lore.kernel.org/r/641c5e40f54e7c9c8eaa6be398d7169445b6fede.1617006498.git.ryder.lee@mediatek.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts index 08ad0ffb24df..f2dc850010f1 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts @@ -495,6 +495,16 @@ groups = "watchdog"; }; }; + + wmac_pins: wmac-pins { + mux { + function = "antsel"; + groups = "antsel0", "antsel1", "antsel2", "antsel3", + "antsel4", "antsel5", "antsel6", "antsel7", + "antsel8", "antsel9", "antsel12", "antsel13", + "antsel14", "antsel15", "antsel16", "antsel17"; + }; + }; }; &pwm { @@ -559,5 +569,7 @@ }; &wmac { + pinctrl-names = "default"; + pinctrl-0 = <&wmac_pins>; status = "okay"; }; -- cgit From b92861799a591e561bb0677d8455119c7e7e348c Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Tue, 23 Feb 2021 23:36:13 +0100 Subject: dt-bindings: arm64: dts: mediatek: Add mt8516-pumpkin board Add binding documentation for the MT8516 Pumpkin board. Signed-off-by: Fabien Parent Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210223223613.2085827-1-fparent@baylibre.com Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index cf24401edb85..93c42f882ee5 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -138,6 +138,10 @@ properties: - const: google,juniper-sku16 - const: google,juniper - const: mediatek,mt8183 + - items: + - enum: + - mediatek,mt8516-pumpkin + - const: mediatek,mt8516 additionalProperties: true -- cgit From 58c9e32352b36533dae26fe89824099ace61aa5f Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Wed, 31 Mar 2021 17:13:24 +0800 Subject: dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kakadu Kakadu is also known as ASUS Chromebook Detachable CM3. Signed-off-by: Hsin-Yi Wang Link: https://lore.kernel.org/r/20210331091327.1198529-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 93c42f882ee5..17c1c2846b09 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -138,6 +138,12 @@ properties: - const: google,juniper-sku16 - const: google,juniper - const: mediatek,mt8183 + - description: Google Kakadu (ASUS Chromebook Detachable CM3) + items: + - const: google,kakadu-rev3 + - const: google,kakadu-rev2 + - const: google,kakadu + - const: mediatek,mt8183 - items: - enum: - mediatek,mt8516-pumpkin -- cgit From d47c1199ca623ba654d277f1b603433f6bef0317 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Wed, 31 Mar 2021 17:13:25 +0800 Subject: dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kodama Kodama is also known as Lenovo 10e Chromebook Tablet. Signed-off-by: Hsin-Yi Wang Link: https://lore.kernel.org/r/20210331091327.1198529-2-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 17c1c2846b09..1a3b8de9b043 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -144,6 +144,15 @@ properties: - const: google,kakadu-rev2 - const: google,kakadu - const: mediatek,mt8183 + - description: Google Kodama (Lenovo 10e Chromebook Tablet) + items: + - enum: + - google,kodama-sku16 + - google,kodama-sku272 + - google,kodama-sku288 + - google,kodama-sku32 + - const: google,kodama + - const: mediatek,mt8183 - items: - enum: - mediatek,mt8516-pumpkin -- cgit From d1eaf77f2c6624d4c1e87e50705d195b452f7fb9 Mon Sep 17 00:00:00 2001 From: Nicolas Boichat Date: Wed, 31 Mar 2021 17:13:26 +0800 Subject: arm64: dts: mt8183: Add kukui kakadu board Kakadu is also known as ASUS Chromebook Detachable CM3. Signed-off-by: Nicolas Boichat Signed-off-by: Hsin-Yi Wang Link: https://lore.kernel.org/r/20210331091327.1198529-3-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/Makefile | 1 + .../boot/dts/mediatek/mt8183-kukui-kakadu.dts | 13 + .../boot/dts/mediatek/mt8183-kukui-kakadu.dtsi | 378 +++++++++++++++++++++ 3 files changed, 392 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index db4753d82a4b..fb891492ad66 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dts new file mode 100644 index 000000000000..20eb0dc68f09 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2020 Google LLC + */ + +/dts-v1/; +#include "mt8183-kukui-kakadu.dtsi" + +/ { + model = "MediaTek kakadu board"; + compatible = "google,kakadu-rev3", "google,kakadu-rev2", + "google,kakadu", "mediatek,mt8183"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi new file mode 100644 index 000000000000..b442e38a3156 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi @@ -0,0 +1,378 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2020 Google LLC + */ + +#include "mt8183-kukui.dtsi" +#include + +/ { + ppvarn_lcd: ppvarn-lcd { + compatible = "regulator-fixed"; + regulator-name = "ppvarn_lcd"; + pinctrl-names = "default"; + pinctrl-0 = <&ppvarn_lcd_en>; + + enable-active-high; + + gpio = <&pio 66 GPIO_ACTIVE_HIGH>; + }; + + ppvarp_lcd: ppvarp-lcd { + compatible = "regulator-fixed"; + regulator-name = "ppvarp_lcd"; + pinctrl-names = "default"; + pinctrl-0 = <&ppvarp_lcd_en>; + + enable-active-high; + + gpio = <&pio 166 GPIO_ACTIVE_HIGH>; + }; + + pp1800_lcd: pp1800-lcd { + compatible = "regulator-fixed"; + regulator-name = "pp1800_lcd"; + pinctrl-names = "default"; + pinctrl-0 = <&pp1800_lcd_en>; + + enable-active-high; + + gpio = <&pio 36 GPIO_ACTIVE_HIGH>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pen_eject>; + + pen-insert { + label = "Pen Insert"; + /* Insert = low, eject = high */ + gpios = <&pio 6 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + wakeup-event-action = ; + wakeup-source; + }; + }; +}; + +&bluetooth { + firmware-name = "nvm_00440302_i2s_eu.bin"; +}; + +&i2c0 { + status = "okay"; + + touchscreen: touchscreen@10 { + compatible = "hid-over-i2c"; + reg = <0x10>; + pinctrl-names = "default"; + pinctrl-0 = <&open_touch>; + + interrupt-parent = <&pio>; + interrupts = <155 IRQ_TYPE_EDGE_FALLING>; + + post-power-on-delay-ms = <10>; + hid-descr-addr = <0x0001>; + }; +}; + +&mt6358_vcama2_reg { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; + clock-frequency = <400000>; + + eeprom@58 { + compatible = "atmel,24c32"; + reg = <0x58>; + pagesize = <32>; + }; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + status = "okay"; + clock-frequency = <400000>; + + eeprom@54 { + compatible = "atmel,24c32"; + reg = <0x54>; + pagesize = <32>; + }; +}; + +&mipi_tx0 { + drive-strength-microamp = <5800>; +}; + +&pio { + /* 192 lines */ + gpio-line-names = + "SPI_AP_EC_CS_L", + "SPI_AP_EC_MOSI", + "SPI_AP_EC_CLK", + "I2S3_DO", + "USB_PD_INT_ODL", + "", + "", + "", + "", + "IT6505_HPD_L", + "I2S3_TDM_D3", + "SOC_I2C6_1V8_SCL", + "SOC_I2C6_1V8_SDA", + "DPI_D0", + "DPI_D1", + "DPI_D2", + "DPI_D3", + "DPI_D4", + "DPI_D5", + "DPI_D6", + "DPI_D7", + "DPI_D8", + "DPI_D9", + "DPI_D10", + "DPI_D11", + "DPI_HSYNC", + "DPI_VSYNC", + "DPI_DE", + "DPI_CK", + "AP_MSDC1_CLK", + "AP_MSDC1_DAT3", + "AP_MSDC1_CMD", + "AP_MSDC1_DAT0", + "AP_MSDC1_DAT2", + "AP_MSDC1_DAT1", + "", + "", + "", + "", + "", + "", + "OTG_EN", + "DRVBUS", + "DISP_PWM", + "DSI_TE", + "LCM_RST_1V8", + "AP_CTS_WIFI_RTS", + "AP_RTS_WIFI_CTS", + "SOC_I2C5_1V8_SCL", + "SOC_I2C5_1V8_SDA", + "SOC_I2C3_1V8_SCL", + "SOC_I2C3_1V8_SDA", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SOC_I2C1_1V8_SDA", + "SOC_I2C0_1V8_SDA", + "SOC_I2C0_1V8_SCL", + "SOC_I2C1_1V8_SCL", + "AP_SPI_H1_MISO", + "AP_SPI_H1_CS_L", + "AP_SPI_H1_MOSI", + "AP_SPI_H1_CLK", + "I2S5_BCK", + "I2S5_LRCK", + "I2S5_DO", + "BOOTBLOCK_EN_L", + "MT8183_KPCOL0", + "SPI_AP_EC_MISO", + "UART_DBG_TX_AP_RX", + "UART_AP_TX_DBG_RX", + "I2S2_MCK", + "I2S2_BCK", + "CLK_5M_WCAM", + "CLK_2M_UCAM", + "I2S2_LRCK", + "I2S2_DI", + "SOC_I2C2_1V8_SCL", + "SOC_I2C2_1V8_SDA", + "SOC_I2C4_1V8_SCL", + "SOC_I2C4_1V8_SDA", + "", + "SCL8", + "SDA8", + "FCAM_PWDN_L", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "", + "", + "", + "", + "", + "", + /* + * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics + * call it BIOS_FLASH_WP_R_L. + */ + "AP_FLASH_WP_L", + "EC_AP_INT_ODL", + "IT6505_INT_ODL", + "H1_INT_OD_L", + "", + "", + "", + "", + "", + "", + "", + "AP_SPI_FLASH_MISO", + "AP_SPI_FLASH_CS_L", + "AP_SPI_FLASH_MOSI", + "AP_SPI_FLASH_CLK", + "DA7219_IRQ", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + ""; + + ppvarp_lcd_en: ppvarp-lcd-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + ppvarn_lcd_en: ppvarn-lcd-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + pp1800_lcd_en: pp1800-lcd-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + open_touch: open_touch { + irq_pin { + pinmux = ; + input-enable; + bias-pull-up; + }; + + rst_pin { + pinmux = ; + + /* + * The pen driver doesn't currently support driving + * this reset line. By specifying output-high here + * we're relying on the fact that this pin has a default + * pulldown at boot (which makes sure the pen was in + * reset if it was powered) and then we set it high here + * to take it out of reset. Better would be if the pen + * driver could control this and we could remove + * "output-high" here. + */ + output-high; + }; + }; + + pen_eject: peneject { + pen_eject { + pinmux = ; + input-enable; + /* External pull-up. */ + bias-disable; + }; + }; +}; + +&qca_wifi { + qcom,ath10k-calibration-variant = "GO_KAKADU"; +}; + +&panel { + status = "okay"; + compatible = "boe,tv105wum-nw0"; +}; -- cgit From ff33d889567eeb744fc427d2a660115217251cc1 Mon Sep 17 00:00:00 2001 From: Hsin-Yi Wang Date: Wed, 31 Mar 2021 17:13:27 +0800 Subject: arm64: dts: mt8183: Add kukui kodama board kodama is also known as Lenovo 10e Chromebook Tablet. Signed-off-by: Hsin-Yi Wang Link: https://lore.kernel.org/r/20210331091327.1198529-4-hsinyi@chromium.org Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/Makefile | 4 + .../dts/mediatek/mt8183-kukui-kodama-sku16.dts | 21 ++ .../dts/mediatek/mt8183-kukui-kodama-sku272.dts | 21 ++ .../dts/mediatek/mt8183-kukui-kodama-sku288.dts | 21 ++ .../dts/mediatek/mt8183-kukui-kodama-sku32.dts | 21 ++ .../boot/dts/mediatek/mt8183-kukui-kodama.dtsi | 343 +++++++++++++++++++++ 6 files changed, 431 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index fb891492ad66..291087dccaa8 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -16,6 +16,10 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku32.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts new file mode 100644 index 000000000000..e3dd75bdaea4 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Google LLC + * + * SKU: 0x10 => 16 + * - bit 8: Camera: 0 (OV5695) + * - bits 7..4: Panel ID: 0x1 (AUO) + */ + +/dts-v1/; +#include "mt8183-kukui-kodama.dtsi" + +/ { + model = "MediaTek kodama sku16 board"; + compatible = "google,kodama-sku16", "google,kodama", "mediatek,mt8183"; +}; + +&panel { + status = "okay"; + compatible = "auo,b101uan08.3"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts new file mode 100644 index 000000000000..d81935ae07bc --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2020 Google LLC + * + * SKU: 0x110 => 272 + * - bit 8: Camera: 1 (GC5035) + * - bits 7..4: Panel ID: 0x1 (AUO) + */ + +/dts-v1/; +#include "mt8183-kukui-kodama.dtsi" + +/ { + model = "MediaTek kodama sku272 board"; + compatible = "google,kodama-sku272", "google,kodama", "mediatek,mt8183"; +}; + +&panel { + status = "okay"; + compatible = "auo,b101uan08.3"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts new file mode 100644 index 000000000000..f4082fbe0517 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2020 Google LLC + * + * SKU: 0x120 => 288 + * - bit 8: Camera: 1 (GC5035) + * - bits 7..4: Panel ID: 0x2 (BOE) + */ + +/dts-v1/; +#include "mt8183-kukui-kodama.dtsi" + +/ { + model = "MediaTek kodama sku288 board"; + compatible = "google,kodama-sku288", "google,kodama", "mediatek,mt8183"; +}; + +&panel { + status = "okay"; + compatible = "boe,tv101wum-n53"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts new file mode 100644 index 000000000000..7739358008ee --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Google LLC + * + * SKU: 0x20 => 32 + * - bit 8: Camera: 0 (OV5695) + * - bits 7..4: Panel ID: 0x2 (BOE) + */ + +/dts-v1/; +#include "mt8183-kukui-kodama.dtsi" + +/ { + model = "MediaTek kodama sku32 board"; + compatible = "google,kodama-sku32", "google,kodama", "mediatek,mt8183"; +}; + +&panel { + status = "okay"; + compatible = "boe,tv101wum-n53"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi new file mode 100644 index 000000000000..2f5234a16ead --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi @@ -0,0 +1,343 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Google LLC + */ + +/dts-v1/; +#include "mt8183-kukui.dtsi" + +/ { + ppvarn_lcd: ppvarn-lcd { + compatible = "regulator-fixed"; + regulator-name = "ppvarn_lcd"; + pinctrl-names = "default"; + pinctrl-0 = <&ppvarn_lcd_en>; + + enable-active-high; + + gpio = <&pio 66 GPIO_ACTIVE_HIGH>; + }; + + ppvarp_lcd: ppvarp-lcd { + compatible = "regulator-fixed"; + regulator-name = "ppvarp_lcd"; + pinctrl-names = "default"; + pinctrl-0 = <&ppvarp_lcd_en>; + + enable-active-high; + + gpio = <&pio 166 GPIO_ACTIVE_HIGH>; + }; + + pp1800_lcd: pp1800-lcd { + compatible = "regulator-fixed"; + regulator-name = "pp1800_lcd"; + pinctrl-names = "default"; + pinctrl-0 = <&pp1800_lcd_en>; + + enable-active-high; + + gpio = <&pio 36 GPIO_ACTIVE_HIGH>; + }; +}; + +&i2c0 { + status = "okay"; + + touchscreen: touchscreen@10 { + compatible = "hid-over-i2c"; + reg = <0x10>; + interrupt-parent = <&pio>; + interrupts = <155 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&touch_default>; + + post-power-on-delay-ms = <10>; + hid-descr-addr = <0x0001>; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; + clock-frequency = <400000>; + + eeprom@58 { + compatible = "atmel,24c64"; + reg = <0x58>; + pagesize = <32>; + }; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + status = "okay"; + clock-frequency = <400000>; + + eeprom@54 { + compatible = "atmel,24c64"; + reg = <0x54>; + pagesize = <32>; + }; +}; + +&mt6358_vcama2_reg { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; +}; + +&pio { + /* 192 lines */ + gpio-line-names = + "SPI_AP_EC_CS_L", + "SPI_AP_EC_MOSI", + "SPI_AP_EC_CLK", + "I2S3_DO", + "USB_PD_INT_ODL", + "", + "", + "", + "", + "IT6505_HPD_L", + "I2S3_TDM_D3", + "SOC_I2C6_1V8_SCL", + "SOC_I2C6_1V8_SDA", + "DPI_D0", + "DPI_D1", + "DPI_D2", + "DPI_D3", + "DPI_D4", + "DPI_D5", + "DPI_D6", + "DPI_D7", + "DPI_D8", + "DPI_D9", + "DPI_D10", + "DPI_D11", + "DPI_HSYNC", + "DPI_VSYNC", + "DPI_DE", + "DPI_CK", + "AP_MSDC1_CLK", + "AP_MSDC1_DAT3", + "AP_MSDC1_CMD", + "AP_MSDC1_DAT0", + "AP_MSDC1_DAT2", + "AP_MSDC1_DAT1", + "", + "", + "", + "", + "", + "", + "OTG_EN", + "DRVBUS", + "DISP_PWM", + "DSI_TE", + "LCM_RST_1V8", + "AP_CTS_WIFI_RTS", + "AP_RTS_WIFI_CTS", + "SOC_I2C5_1V8_SCL", + "SOC_I2C5_1V8_SDA", + "SOC_I2C3_1V8_SCL", + "SOC_I2C3_1V8_SDA", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SOC_I2C1_1V8_SDA", + "SOC_I2C0_1V8_SDA", + "SOC_I2C0_1V8_SCL", + "SOC_I2C1_1V8_SCL", + "AP_SPI_H1_MISO", + "AP_SPI_H1_CS_L", + "AP_SPI_H1_MOSI", + "AP_SPI_H1_CLK", + "I2S5_BCK", + "I2S5_LRCK", + "I2S5_DO", + "BOOTBLOCK_EN_L", + "MT8183_KPCOL0", + "SPI_AP_EC_MISO", + "UART_DBG_TX_AP_RX", + "UART_AP_TX_DBG_RX", + "I2S2_MCK", + "I2S2_BCK", + "CLK_5M_WCAM", + "CLK_2M_UCAM", + "I2S2_LRCK", + "I2S2_DI", + "SOC_I2C2_1V8_SCL", + "SOC_I2C2_1V8_SDA", + "SOC_I2C4_1V8_SCL", + "SOC_I2C4_1V8_SDA", + "", + "SCL8", + "SDA8", + "FCAM_PWDN_L", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "I2S_PMIC", + "", + "", + "", + "", + "", + "", + /* + * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics + * call it BIOS_FLASH_WP_R_L. + */ + "AP_FLASH_WP_L", + "EC_AP_INT_ODL", + "IT6505_INT_ODL", + "H1_INT_OD_L", + "", + "", + "", + "", + "", + "", + "", + "AP_SPI_FLASH_MISO", + "AP_SPI_FLASH_CS_L", + "AP_SPI_FLASH_MOSI", + "AP_SPI_FLASH_CLK", + "DA7219_IRQ", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + ""; + + ppvarp_lcd_en: ppvarp-lcd-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + ppvarn_lcd_en: ppvarn-lcd-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + pp1800_lcd_en: pp1800-lcd-en { + pins1 { + pinmux = ; + output-low; + }; + }; + + touch_default: touchdefault { + pin_irq { + pinmux = ; + input-enable; + bias-pull-up; + }; + + touch_pin_reset: pin_reset { + pinmux = ; + + /* + * The touchscreen driver doesn't currently support driving + * this reset line. By specifying output-high here + * we're relying on the fact that this pin has a default + * pulldown at boot (which makes sure the controller was in + * reset if it was powered) and then we set it high here + * to take it out of reset. Better would be if the touchscreen + * driver could control this and we could remove + * "output-high" here. + */ + output-high; + }; + }; +}; + +&qca_wifi { + qcom,ath10k-calibration-variant = "GO_KODAMA"; +}; + +&i2c_tunnel { + google,remote-bus = <2>; +}; -- cgit From ea69876c7b0ad08397999c8a83fc81e424351b73 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Wed, 17 Feb 2021 21:59:43 +0100 Subject: dt-bindings: arm64: dts: mediatek: Add mt8183-pumpkin board Add binding documentation for the MT8183 Pumpkin board. Signed-off-by: Fabien Parent Acked-by: Rob Herring Link: https://lore.kernel.org/r/20210217205945.830006-1-fparent@baylibre.com Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 1a3b8de9b043..aff57a8c8c30 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -153,6 +153,10 @@ properties: - google,kodama-sku32 - const: google,kodama - const: mediatek,mt8183 + - items: + - enum: + - mediatek,mt8183-pumpkin + - const: mediatek,mt8183 - items: - enum: - mediatek,mt8516-pumpkin -- cgit From 19b6403f1e2a6ceda39dade45c9c3f2ad59617d8 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Wed, 17 Feb 2021 21:59:44 +0100 Subject: arm64: dts: mt8183: add mt8183 pumpkin board The MT8183 Pumpkin board is manufactured by OLogic and includes a MediaTek MT8183 SoC with 2GB of RAM. The board provides the following IOs: * 2 USB Type-A ports * Ethernet * Serial UART over micro-USB port * 1 USB Type-C dual role port * 1 USB Type-C power only port * 1 Jack for audio * RPI compatible header * MT7668 wiresless chip with Wi-Fi AC and BT 5 * Micro-HDMI port * 2 connectors for CSI cameras * 1 connector for DSI display * 1 JTAG port Signed-off-by: Fabien Parent Link: https://lore.kernel.org/r/20210217205945.830006-2-fparent@baylibre.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts | 378 ++++++++++++++++++++++++ 2 files changed, 379 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 291087dccaa8..a1c50adc98fa 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -22,5 +22,6 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku32.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-pumpkin.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts new file mode 100644 index 000000000000..eb6e595c2975 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts @@ -0,0 +1,378 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 BayLibre, SAS. + * Author: Fabien Parent + */ + +/dts-v1/; + +#include +#include "mt8183.dtsi" +#include "mt6358.dtsi" + +/ { + model = "Pumpkin MT8183"; + compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183"; + + aliases { + serial0 = &uart0; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x80000000>; + }; + + chosen { + stdout-path = "serial0:921600n8"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + scp_mem_reserved: scp_mem_region { + compatible = "shared-dma-pool"; + reg = <0 0x50000000 0 0x2900000>; + no-map; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-red { + label = "red"; + gpios = <&pio 155 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led-green { + label = "green"; + gpios = <&pio 156 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + ntc@0 { + compatible = "murata,ncp03wf104"; + pullup-uv = <1800000>; + pullup-ohm = <390000>; + pulldown-ohm = <0>; + io-channels = <&auxadc 0>; + }; +}; + +&auxadc { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins_0>; + status = "okay"; + clock-frequency = <100000>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins_1>; + status = "okay"; + clock-frequency = <100000>; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins_2>; + status = "okay"; + clock-frequency = <100000>; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins_3>; + status = "okay"; + clock-frequency = <100000>; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins_4>; + status = "okay"; + clock-frequency = <100000>; +}; + +&i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins_5>; + status = "okay"; + clock-frequency = <100000>; +}; + +&i2c6 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_pins>; + status = "okay"; + clock-frequency = <100000>; +}; + +&mmc0 { + status = "okay"; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + cap-mmc-hw-reset; + no-sdio; + no-sd; + hs400-ds-delay = <0x12814>; + vmmc-supply = <&mt6358_vemc_reg>; + vqmmc-supply = <&mt6358_vio18_reg>; + assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>; + assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>; + non-removable; +}; + +&mmc1 { + status = "okay"; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>; + bus-width = <4>; + max-frequency = <200000000>; + cap-sd-highspeed; + sd-uhs-sdr50; + sd-uhs-sdr104; + cap-sdio-irq; + no-mmc; + no-sd; + vmmc-supply = <&mt6358_vmch_reg>; + vqmmc-supply = <&mt6358_vmc_reg>; + keep-power-in-suspend; + enable-sdio-wakeup; + non-removable; +}; + +&pio { + i2c_pins_0: i2c0 { + pins_i2c{ + pinmux = , + ; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <00>; + }; + }; + + i2c_pins_1: i2c1 { + pins_i2c{ + pinmux = , + ; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <00>; + }; + }; + + i2c_pins_2: i2c2 { + pins_i2c{ + pinmux = , + ; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <00>; + }; + }; + + i2c_pins_3: i2c3 { + pins_i2c{ + pinmux = , + ; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <00>; + }; + }; + + i2c_pins_4: i2c4 { + pins_i2c{ + pinmux = , + ; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <00>; + }; + }; + + i2c_pins_5: i2c5 { + pins_i2c{ + pinmux = , + ; + mediatek,pull-up-adv = <3>; + mediatek,drive-strength-adv = <00>; + }; + }; + + i2c6_pins: i2c6 { + pins_cmd_dat { + pinmux = , + ; + mediatek,pull-up-adv = <3>; + }; + }; + + mmc0_pins_default: mmc0-pins-default { + pins_cmd_dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + mediatek,pull-up-adv = <01>; + }; + + pins_clk { + pinmux = ; + drive-strength = ; + mediatek,pull-down-adv = <10>; + }; + + pins_rst { + pinmux = ; + drive-strength = ; + mediatek,pull-down-adv = <01>; + }; + }; + + mmc0_pins_uhs: mmc0-pins-uhs { + pins_cmd_dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + mediatek,pull-up-adv = <01>; + }; + + pins_clk { + pinmux = ; + drive-strength = ; + mediatek,pull-down-adv = <10>; + }; + + pins_ds { + pinmux = ; + drive-strength = ; + mediatek,pull-down-adv = <10>; + }; + + pins_rst { + pinmux = ; + drive-strength = ; + mediatek,pull-up-adv = <01>; + }; + }; + + mmc1_pins_default: mmc1-pins-default { + pins_cmd_dat { + pinmux = , + , + , + , + ; + input-enable; + mediatek,pull-up-adv = <10>; + }; + + pins_clk { + pinmux = ; + input-enable; + mediatek,pull-down-adv = <10>; + }; + + pins_pmu { + pinmux = ; + output-high; + }; + }; + + mmc1_pins_uhs: mmc1-pins-uhs { + pins_cmd_dat { + pinmux = , + , + , + , + ; + drive-strength = ; + input-enable; + mediatek,pull-up-adv = <10>; + }; + + pins_clk { + pinmux = ; + drive-strength = ; + mediatek,pull-down-adv = <10>; + input-enable; + }; + }; +}; + +&mfg { + domain-supply = <&mt6358_vgpu_reg>; +}; + +&cpu0 { + proc-supply = <&mt6358_vproc12_reg>; +}; + +&cpu1 { + proc-supply = <&mt6358_vproc12_reg>; +}; + +&cpu2 { + proc-supply = <&mt6358_vproc12_reg>; +}; + +&cpu3 { + proc-supply = <&mt6358_vproc12_reg>; +}; + +&cpu4 { + proc-supply = <&mt6358_vproc11_reg>; +}; + +&cpu5 { + proc-supply = <&mt6358_vproc11_reg>; +}; + +&cpu6 { + proc-supply = <&mt6358_vproc11_reg>; +}; + +&cpu7 { + proc-supply = <&mt6358_vproc11_reg>; +}; + +&uart0 { + status = "okay"; +}; + +&scp { + status = "okay"; +}; + +&dsi0 { + status = "disabled"; +}; -- cgit From a7dceafed43a4a610d340da3703653cca2c50c1d Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Tue, 23 Feb 2021 23:18:26 +0100 Subject: arm64: dts: mediatek: fix reset GPIO level on pumpkin The tca6416 chip is active low. Fix the reset-gpios value. Fixes: e2a8fa1e0faa ("arm64: dts: mediatek: fix tca6416 reset GPIOs in pumpkin") Signed-off-by: Fabien Parent Link: https://lore.kernel.org/r/20210223221826.2063911-1-fparent@baylibre.com Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi b/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi index 7d738f01cf8d..fcddec14738d 100644 --- a/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi +++ b/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi @@ -56,7 +56,7 @@ tca6416: gpio@20 { compatible = "ti,tca6416"; reg = <0x20>; - reset-gpios = <&pio 65 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 65 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&tca6416_pins>; -- cgit