From d7fa8ed4337235511be39699a5295777cc326257 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 12 Feb 2019 18:45:50 +0100 Subject: ARM: dts: exynos: Use ADC for Exynos4x12 on Exynos4412 Exynos4412 should use "samsung,exynos4212-adc" compatible to report proper number of (four) channels. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4412.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 26ad6ab3c6af..e5c041ec0756 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -274,7 +274,7 @@ }; adc: adc@126c0000 { - compatible = "samsung,exynos-adc-v1"; + compatible = "samsung,exynos4212-adc"; reg = <0x126C0000 0x100>; interrupt-parent = <&combiner>; interrupts = <10 3>; -- cgit From 15b8831f87874c21e431ffa3801781690973c384 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 12 Feb 2019 18:46:38 +0100 Subject: ARM: dts: exynos: Document regulator used by ADC on Odroid U3 Add ADC node to Odroid U3 with its regulator, purely for documentation purposes. The ADC stays disabled because it is not used (all inputs grounded). Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos4412-odroidu3.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts index 2bdf899df436..88891ff5f238 100644 --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -66,6 +66,11 @@ }; }; +&adc { + vdd-supply = <&ldo10_reg>; + /* Nothing connected to ADC inputs, keep it disabled */ +}; + /* Supply for LAN9730/SMSC95xx */ &buck8_reg { regulator-name = "BUCK8_P3V3"; -- cgit From f35020b94a45f09b4dd97b4f1d721059f5a20867 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 18 Feb 2019 18:32:56 +0100 Subject: ARM: dts: exynos: Use stdout path property on Arndale Octa board Replacing bootargs with stdout-path property in chosen node allows using early console by adding just 'earlycon' parameter to kernel command line. Suggested-by: Marek Szyprowski Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 3447160e1fbf..832757999e4f 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -24,7 +24,7 @@ }; chosen { - bootargs = "console=ttySAC3,115200"; + stdout-path = "serial3:115200n8"; }; firmware@2073000 { -- cgit From 3619452589d0ea295351c6557061b37341a0cbc3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 18 Feb 2019 18:32:57 +0100 Subject: ARM: dts: exynos: Add unused PMIC regulators on Arndale Octa board Define the LDO14, LDO17, LDO22, LDO25, LDO30, LDO34, LDO36 and LDO37 unused regulators to describe the hardware. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 56 +++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 832757999e4f..308c74ebeacd 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -180,6 +180,13 @@ regulator-max-microvolt = <2800000>; }; + ldo14_reg: LDO14 { + /* Unused */ + regulator-name = "PVDD_LDO14"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + ldo15_reg: LDO15 { regulator-name = "PVDD_PERI_2V8"; regulator-min-microvolt = <3300000>; @@ -192,6 +199,13 @@ regulator-max-microvolt = <2200000>; }; + ldo17_reg: LDO17 { + /* Unused */ + regulator-name = "PVDD_LDO17"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + ldo18_reg: LDO18 { regulator-name = "PVDD_EMMC_1V8"; regulator-min-microvolt = <1800000>; @@ -216,6 +230,13 @@ regulator-max-microvolt = <1800000>; }; + ldo22_reg: LDO22 { + /* Unused */ + regulator-name = "PVDD_LDO22"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <2375000>; + }; + ldo23_reg: LDO23 { regulator-name = "PVDD_MIFS_1V1"; regulator-min-microvolt = <1200000>; @@ -229,6 +250,13 @@ regulator-max-microvolt = <2800000>; }; + ldo25_reg: LDO25 { + /* Unused */ + regulator-name = "PVDD_LDO25"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + ldo26_reg: LDO26 { regulator-name = "PVDD_CAM0_AF_2V8"; regulator-min-microvolt = <3000000>; @@ -253,6 +281,13 @@ regulator-max-microvolt = <1800000>; }; + ldo30_reg: LDO30 { + /* Unused */ + regulator-name = "PVDD_LDO30"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + ldo31_reg: LDO31 { regulator-name = "PVDD_PERI_1V8"; regulator-min-microvolt = <1800000>; @@ -271,12 +306,33 @@ regulator-max-microvolt = <1800000>; }; + ldo34_reg: LDO34 { + /* Unused */ + regulator-name = "PVDD_LDO34"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + ldo35_reg: LDO35 { regulator-name = "PVDD_CAM0_DVDD_1V2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; + ldo36_reg: LDO36 { + /* Unused */ + regulator-name = "PVDD_LDO36"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo37_reg: LDO37 { + /* Unused */ + regulator-name = "PVDD_LDO37"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + ldo38_reg: LDO38 { regulator-name = "PVDD_CAM0_AVDD_2V8"; regulator-min-microvolt = <2800000>; -- cgit From 29a0a2a848ecf5af699f27a46efb39adaa33449f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 18 Feb 2019 20:48:40 +0100 Subject: ARM: dts: exynos: Add CPU cooling on Arndale Octa Arndale Octa board comes without fan so proper CPU cooling is necessary to avoid critical shutdowns when CPUs are busy. Although thermal zones were present but CPU cooling was missing in DTS. Adjust the trip points and add respective cooling nodes for each CPU thermal zone. The CPU throttling will start at 60 degrees of C, intensify at 80 degrees of C and slow down CPUs as much as possible at 110 degrees of C. With this configuration, when running four CPU intensive tasks, the temperatures did not exceed 90 degrees of Celsius mostly oscillating around 88 degrees in hottest thermal zone. Test was however done with only four CPUs online (big cluster, Cortex A15) because of errors when booting secondary CPUs. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 264 ++++++++++++++++++++++++++ 1 file changed, 264 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 308c74ebeacd..889712481c95 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -59,6 +59,270 @@ cpu-supply = <&buck6_reg>; }; +&cpu0_thermal { + trips { + cpu0_alert0: cpu-alert-0 { + temperature = <60000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "passive"; + }; + cpu0_alert1: cpu-alert-1 { + temperature = <80000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu0_alert2: cpu-alert-2 { + temperature = <110000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu0_crit0: cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + /* + * Reduce the CPU speed by 2 steps, down to: 1600 MHz + * and 1100 MHz. + */ + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&cpu0 0 2>, + <&cpu1 0 2>, + <&cpu2 0 2>, + <&cpu3 0 2>, + <&cpu4 0 2>, + <&cpu5 0 2>, + <&cpu6 0 2>, + <&cpu7 0 2>; + }; + + /* + * Reduce the CPU speed down to 1200 MHz big (6 steps) + * and 800 MHz LITTLE (5 steps). + */ + map1 { + trip = <&cpu0_alert1>; + cooling-device = <&cpu0 3 6>, + <&cpu1 3 6>, + <&cpu2 3 6>, + <&cpu3 3 6>, + <&cpu4 3 5>, + <&cpu5 3 5>, + <&cpu6 3 5>, + <&cpu7 3 5>; + }; + + /* + * Reduce the CPU speed as much as possible, down to 700 MHz + * big (11 steps) and 600 MHz LITTLE (7 steps). + */ + map2 { + trip = <&cpu0_alert2>; + cooling-device = <&cpu0 6 11>, + <&cpu1 6 11>, + <&cpu2 6 11>, + <&cpu3 6 11>, + <&cpu4 5 7>, + <&cpu5 5 7>, + <&cpu6 5 7>, + <&cpu7 5 7>; + }; + }; +}; + +&cpu1_thermal { + trips { + cpu1_alert0: cpu-alert-0 { + temperature = <60000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "passive"; + }; + cpu1_alert1: cpu-alert-1 { + temperature = <80000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu1_alert2: cpu-alert-2 { + temperature = <110000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu1_crit0: cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu1_alert0>; + cooling-device = <&cpu0 0 2>, + <&cpu1 0 2>, + <&cpu2 0 2>, + <&cpu3 0 2>, + <&cpu4 0 2>, + <&cpu5 0 2>, + <&cpu6 0 2>, + <&cpu7 0 2>; + }; + + map1 { + trip = <&cpu1_alert1>; + cooling-device = <&cpu0 3 6>, + <&cpu1 3 6>, + <&cpu2 3 6>, + <&cpu3 3 6>, + <&cpu4 3 5>, + <&cpu5 3 5>, + <&cpu6 3 5>, + <&cpu7 3 5>; + }; + + map2 { + trip = <&cpu1_alert2>; + cooling-device = <&cpu0 6 11>, + <&cpu1 6 11>, + <&cpu2 6 11>, + <&cpu3 6 11>, + <&cpu4 5 7>, + <&cpu5 5 7>, + <&cpu6 5 7>, + <&cpu7 5 7>; + }; + }; +}; + +&cpu2_thermal { + trips { + cpu2_alert0: cpu-alert-0 { + temperature = <60000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "passive"; + }; + cpu2_alert1: cpu-alert-1 { + temperature = <80000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu2_alert2: cpu-alert-2 { + temperature = <110000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu2_crit0: cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu2_alert0>; + cooling-device = <&cpu0 0 2>, + <&cpu1 0 2>, + <&cpu2 0 2>, + <&cpu3 0 2>, + <&cpu4 0 2>, + <&cpu5 0 2>, + <&cpu6 0 2>, + <&cpu7 0 2>; + }; + + map1 { + trip = <&cpu2_alert1>; + cooling-device = <&cpu0 3 6>, + <&cpu1 3 6>, + <&cpu2 3 6>, + <&cpu3 3 6>, + <&cpu4 3 5>, + <&cpu5 3 5>, + <&cpu6 3 5>, + <&cpu7 3 5>; + }; + + map2 { + trip = <&cpu2_alert2>; + cooling-device = <&cpu0 6 11>, + <&cpu1 6 11>, + <&cpu2 6 11>, + <&cpu3 6 11>, + <&cpu4 6 7>, + <&cpu5 6 7>, + <&cpu6 6 7>, + <&cpu7 6 7>; + }; + }; +}; + +&cpu3_thermal { + trips { + cpu3_alert0: cpu-alert-0 { + temperature = <60000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "passive"; + }; + cpu3_alert1: cpu-alert-1 { + temperature = <80000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu3_alert2: cpu-alert-2 { + temperature = <110000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu3_crit0: cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu3_alert0>; + cooling-device = <&cpu0 0 2>, + <&cpu1 0 2>, + <&cpu2 0 2>, + <&cpu3 0 2>, + <&cpu4 0 2>, + <&cpu5 0 2>, + <&cpu6 0 2>, + <&cpu7 0 2>; + }; + + map1 { + trip = <&cpu3_alert1>; + cooling-device = <&cpu0 3 6>, + <&cpu1 3 6>, + <&cpu2 3 6>, + <&cpu3 3 6>, + <&cpu4 3 5>, + <&cpu5 3 5>, + <&cpu6 3 5>, + <&cpu7 3 5>; + }; + + map2 { + trip = <&cpu3_alert2>; + cooling-device = <&cpu0 6 11>, + <&cpu1 6 11>, + <&cpu2 6 11>, + <&cpu3 6 11>, + <&cpu4 5 7>, + <&cpu5 5 7>, + <&cpu6 5 7>, + <&cpu7 5 7>; + }; + }; +}; + &usbdrd_dwc3_1 { dr_mode = "host"; }; -- cgit From eb1d0a50f74ce05a06ea150d8b677718f7390920 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 18 Feb 2019 20:48:41 +0100 Subject: ARM: dts: exynos: Order nodes alphabetically in Arndale Octa Having nodes and overrides-by-label ordered alphabetically reduces the possibility of conflicts from simultaneous edits. No functional change. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 889712481c95..0d4dbd4324a6 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -51,6 +51,10 @@ }; }; +&cci { + status = "disabled"; +}; + &cpu0 { cpu-supply = <&buck2_reg>; }; @@ -323,14 +327,6 @@ }; }; -&usbdrd_dwc3_1 { - dr_mode = "host"; -}; - -&cci { - status = "disabled"; -}; - &hdmi { hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; vdd_osc-supply = <&ldo7_reg>; @@ -724,3 +720,7 @@ clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; clock-names = "rtc", "rtc_src"; }; + +&usbdrd_dwc3_1 { + dr_mode = "host"; +}; -- cgit From 17c130a170f2b6a06b0ad88b6f564f5fe5a2cb79 Mon Sep 17 00:00:00 2001 From: Stuart Menefy Date: Tue, 19 Feb 2019 13:03:34 +0000 Subject: ARM: dts: exynos: Use bustop PLL as the source for MMC clocks on Exynos5260 By default the MMC clock will be derived from mediatop PLL, which usually runs at 666MHz. However as most SD and MMC clocks are multiples or fractions of 100MHz, it makes more sense to use the bustop PLL which runs at 800MHz. This matches the behaviour of the Samsung vendor supplied 3.4 kernel. Signed-off-by: Stuart Menefy Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5260.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi index 55167850619c..14b423de9137 100644 --- a/arch/arm/boot/dts/exynos5260.dtsi +++ b/arch/arm/boot/dts/exynos5260.dtsi @@ -288,6 +288,14 @@ #size-cells = <0>; clocks = <&clock_fsys FSYS_CLK_MMC0>, <&clock_top TOP_SCLK_MMC0>; clock-names = "biu", "ciu"; + assigned-clocks = + <&clock_top TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A>, + <&clock_top TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_B>, + <&clock_top TOP_SCLK_MMC0>; + assigned-clock-parents = + <&clock_top TOP_MOUT_BUSTOP_PLL_USER>, + <&clock_top TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A>; + assigned-clock-rates = <0>, <0>, <800000000>; fifo-depth = <64>; status = "disabled"; }; @@ -300,6 +308,14 @@ #size-cells = <0>; clocks = <&clock_fsys FSYS_CLK_MMC1>, <&clock_top TOP_SCLK_MMC1>; clock-names = "biu", "ciu"; + assigned-clocks = + <&clock_top TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A>, + <&clock_top TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_B>, + <&clock_top TOP_SCLK_MMC1>; + assigned-clock-parents = + <&clock_top TOP_MOUT_BUSTOP_PLL_USER>, + <&clock_top TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A>; + assigned-clock-rates = <0>, <0>, <800000000>; fifo-depth = <64>; status = "disabled"; }; @@ -312,6 +328,14 @@ #size-cells = <0>; clocks = <&clock_fsys FSYS_CLK_MMC2>, <&clock_top TOP_SCLK_MMC2>; clock-names = "biu", "ciu"; + assigned-clocks = + <&clock_top TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A>, + <&clock_top TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_B>, + <&clock_top TOP_SCLK_MMC2>; + assigned-clock-parents = + <&clock_top TOP_MOUT_BUSTOP_PLL_USER>, + <&clock_top TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A>; + assigned-clock-rates = <0>, <0>, <800000000>; fifo-depth = <64>; status = "disabled"; }; -- cgit From c5432b1d44a787ae8e8d8097e05f7ed9cf563535 Mon Sep 17 00:00:00 2001 From: Stuart Menefy Date: Tue, 19 Feb 2019 13:03:35 +0000 Subject: ARM: dts: exynos: Add high speed I2C ports for Exynos5260 Most of the work to support the high speed I2C ports on the Exynos5260 was added in commit 218e1496135e ("i2c: exynos5: add support for HSI2C on Exynos5260 SoC") and the pinctrl nodes have always been available. All that is missing to get them working is the addition of the DT bindings. Signed-off-by: Stuart Menefy Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5260.dtsi | 56 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi index 14b423de9137..a8c7c6e589a0 100644 --- a/arch/arm/boot/dts/exynos5260.dtsi +++ b/arch/arm/boot/dts/exynos5260.dtsi @@ -17,6 +17,10 @@ #size-cells = <1>; aliases { + i2c0 = &hsi2c_0; + i2c1 = &hsi2c_1; + i2c2 = &hsi2c_2; + i2c3 = &hsi2c_3; pinctrl0 = &pinctrl_0; pinctrl1 = &pinctrl_1; pinctrl2 = &pinctrl_2; @@ -339,6 +343,58 @@ fifo-depth = <64>; status = "disabled"; }; + + hsi2c_0: hsi2c@12da0000 { + compatible = "samsung,exynos5260-hsi2c"; + reg = <0x12DA0000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_hs_bus>; + clocks = <&clock_peri PERI_CLK_HSIC0>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_1: hsi2c@12db0000 { + compatible = "samsung,exynos5260-hsi2c"; + reg = <0x12DB0000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_hs_bus>; + clocks = <&clock_peri PERI_CLK_HSIC1>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_2: hsi2c@12dc0000 { + compatible = "samsung,exynos5260-hsi2c"; + reg = <0x12DC0000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_hs_bus>; + clocks = <&clock_peri PERI_CLK_HSIC2>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_3: hsi2c@12dd0000 { + compatible = "samsung,exynos5260-hsi2c"; + reg = <0x12DD0000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_hs_bus>; + clocks = <&clock_peri PERI_CLK_HSIC3>; + clock-names = "hsi2c"; + status = "disabled"; + }; }; }; -- cgit From 7f396393b941e5594d927933175301d0db13f5a6 Mon Sep 17 00:00:00 2001 From: Stuart Menefy Date: Tue, 19 Feb 2019 13:03:36 +0000 Subject: ARM: dts: exynos: Add interrupts for dedicated EINTs on Exynos5260 Add the missing interrupt information for the GPIO lines with dedicated EINT interrupts. Signed-off-by: Stuart Menefy Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5260-pinctrl.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi index b1edb20b789e..17e2f3e0d71e 100644 --- a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi @@ -153,6 +153,14 @@ #gpio-cells = <2>; interrupt-controller; + interrupts = , + , + , + , + , + , + , + ; #interrupt-cells = <2>; }; @@ -161,6 +169,14 @@ #gpio-cells = <2>; interrupt-controller; + interrupts = , + , + , + , + , + , + , + ; #interrupt-cells = <2>; }; -- cgit From b7ed69d67ff0788d8463e599dd5dd1b45c701a7e Mon Sep 17 00:00:00 2001 From: Stuart Menefy Date: Tue, 19 Feb 2019 13:03:37 +0000 Subject: ARM: dts: exynos: Fix interrupt for shared EINTs on Exynos5260 Fix the interrupt information for the GPIO lines with a shared EINT interrupt. Fixes: 16d7ff2642e7 ("ARM: dts: add dts files for exynos5260 SoC") Cc: stable@vger.kernel.org Signed-off-by: Stuart Menefy Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5260.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi index a8c7c6e589a0..3581b57fbbf7 100644 --- a/arch/arm/boot/dts/exynos5260.dtsi +++ b/arch/arm/boot/dts/exynos5260.dtsi @@ -227,7 +227,7 @@ wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = ; + interrupts = ; }; }; -- cgit From 23c856787a80efd475c0d82c6e49a65c73561816 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 23 Feb 2019 21:29:32 +0100 Subject: ARM: dts: exynos: Enable ADC on Arndale Octa Arndale Octa (Exynos5420) has two ADC pins (AIN0 and AIN1) exposed on CON6 header pins. Add ADC node to DTS file to enable it. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 0d4dbd4324a6..d3e024560db4 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -51,6 +51,11 @@ }; }; +&adc { + vdd-supply = <&ldo4_reg>; + status = "okay"; +}; + &cci { status = "disabled"; }; -- cgit From 34dc82257488ccbdfb6ecdd087b3c8b371e03ee3 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 6 Mar 2019 11:40:56 +0100 Subject: ARM: dts: exynos: Fix audio routing on Odroid XU3 Add missing audio routing entry for the capture stream, this change is required to fix audio recording on Odroid XU3/XU3-Lite. Fixes: 885b005d232c ("ARM: dts: exynos: Add support for secondary DAI to Odroid XU3") Cc: stable@vger.kernel.org Signed-off-by: Sylwester Nawrocki Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi index 51a843bd65ed..3a37267e6134 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi @@ -26,7 +26,8 @@ "Speakers", "SPKL", "Speakers", "SPKR", "I2S Playback", "Mixer DAI TX", - "HiFi Playback", "Mixer DAI TX"; + "HiFi Playback", "Mixer DAI TX", + "Mixer DAI RX", "HiFi Capture"; assigned-clocks = <&clock CLK_MOUT_EPLL>, <&clock CLK_MOUT_MAU_EPLL>, -- cgit From 30082e7b3513ff6e8a6d5e97d72af7074bb767ee Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 9 Mar 2019 16:00:37 +0100 Subject: ARM: dts: exynos: Adjust ldo23 and ldo27 to lower levels on Arndale Octa Although on the schematics of Insignal Arndale Octa board the PVDD_MIFS_1V1 (ldo23) and PVDD_G3DS_1V0 (ldo27) are marked as 1.2 V, the vendor v3.4 Android kernel sets them lower. Also name suggests that they should work on 1.1 V and 1.0 V respectively, not 1.2 V. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index d3e024560db4..b12286d545b6 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -504,8 +504,8 @@ ldo23_reg: LDO23 { regulator-name = "PVDD_MIFS_1V1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; regulator-always-on; }; @@ -530,8 +530,8 @@ ldo27_reg: LDO27 { regulator-name = "PVDD_G3DS_1V0"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1100000>; }; ldo28_reg: LDO28 { -- cgit From 3a6a6d0a8b660c9a075c981e40405cc67b145972 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 9 Mar 2019 16:00:38 +0100 Subject: ARM: dts: exynos: Add support for UHS-I SD cards on Arndale Octa The Exynos5420's Mobile Storage Host supports SD cards in UHS-I standard (SD specification v3.0), with 1.8 V signaling in SD UHS DDR50. Adjust the regulator and add necessary capability properties. Change the SDR and DDR timings to match values in Insignal v3.4 Android kernel. Tested with SD UHS-I card in SD UHS DDR50 mode. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index b12286d545b6..de0a6840dfbc 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -441,7 +441,7 @@ ldo13_reg: LDO13 { regulator-name = "PVDD_APIO_MMCOFF_2V8"; - regulator-min-microvolt = <2800000>; + regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2800000>; }; @@ -701,14 +701,17 @@ status = "okay"; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; vmmc-supply = <&ldo19_reg>; vqmmc-supply = <&ldo13_reg>; bus-width = <4>; cap-sd-highspeed; + sd-uhs-sdr50; + sd-uhs-sdr104; + sd-uhs-ddr50; }; &pinctrl_0 { -- cgit From 9a435fb2291d583ae012d4e853bd9987b367bba1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 9 Mar 2019 16:00:39 +0100 Subject: ARM: dts: exynos: Extend the eMMC node on Arndale Octa Describe properly the MMC0 node (with attached embedded MMC memory) on Arndale Octa by: 1. Adding the regulator for host interface (although it still has to be "always-on" so the board with Linaro U-Boot will boot properly); 2. Using "non-removable" instead of "broken-cd" property, because eMMC is embedded into the board; 3. Adding support for HS200 v1.8 to indicate such support in host controller although this has no practical effect (embedded memory does not support it). Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index de0a6840dfbc..74184c6ce3bf 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -378,6 +378,12 @@ regulator-name = "PVDD_APIO_MMCON_1V8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + /* + * Must be always on, even though there is + * a consumer (mmc_0). Otherwise the board + * does not reboot with vendor U-Boot + * (Linaro for Arndale Octa, v2012.07). + */ regulator-always-on; }; @@ -685,7 +691,7 @@ &mmc_0 { status = "okay"; - broken-cd; + non-removable; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <0 4>; @@ -693,8 +699,10 @@ pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; vmmc-supply = <&ldo10_reg>; + vqmmc-supply = <&ldo3_reg>; bus-width = <8>; cap-mmc-highspeed; + mmc-hs200-1_8v; }; &mmc_2 { -- cgit From 5ab99cf7d5e96e3b727c30e7a8524c976bd3723d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 14 Mar 2019 21:02:17 +0100 Subject: ARM: dts: exynos: Always enable necessary APIO_1V8 and ABB_1V8 regulators on Arndale Octa The PVDD_APIO_1V8 (LDO2) and PVDD_ABB_1V8 (LDO8) regulators were turned off by Linux kernel as unused. However they supply critical parts of SoC so they should be always on: 1. PVDD_APIO_1V8 supplies SYS pins (gpx[0-3], PSHOLD), HDMI level shift, RTC, VDD1_12 (DRAM internal 1.8 V logic), pull-up for PMIC interrupt lines, TTL/UARTR level shift, reset pins and SW-TACT1 button. It also supplies unused blocks like VDDQ_SRAM (for SROM controller) and VDDQ_GPIO (gpm7, gpy7). The LDO2 cannot be turned off (S2MPS11 keeps it on anyway) so marking it "always-on" only reflects its real status. 2. PVDD_ABB_1V8 supplies Adaptive Body Bias Generator for ARM cores, memory and Mali (G3D). Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 74184c6ce3bf..dbf0306896f6 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -372,6 +372,7 @@ regulator-name = "PVDD_APIO_1V8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; }; ldo3_reg: LDO3 { @@ -416,6 +417,7 @@ regulator-name = "PVDD_ABB_1V8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; }; ldo9_reg: LDO9 { -- cgit From 9b23e1a3e8fde76e8cc0e366ab1ed4ffb4440feb Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 20 Mar 2019 10:59:50 +0100 Subject: ARM: dts: exynos: Fix audio (microphone) routing on Odroid XU3 The name of CODEC input widget to which microphone is connected through the "Headphone" jack is "IN12" not "IN1". This fixes microphone support on Odroid XU3. Cc: # v4.14+ Signed-off-by: Sylwester Nawrocki Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi index 3a37267e6134..c3c2d85267da 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi @@ -22,7 +22,7 @@ "Headphone Jack", "HPL", "Headphone Jack", "HPR", "Headphone Jack", "MICBIAS", - "IN1", "Headphone Jack", + "IN12", "Headphone Jack", "Speakers", "SPKL", "Speakers", "SPKR", "I2S Playback", "Mixer DAI TX", -- cgit From 1fb8c97f9d96400cd0a7f5553844da1eae5594e4 Mon Sep 17 00:00:00 2001 From: Benjamin Drung Date: Sun, 3 Feb 2019 21:13:30 +0100 Subject: ARM: dts: exynos: Fix spelling mistake of EXYNOS5420 The SoC name EXYNOS5420 was misspelled. Signed-off-by: Benjamin Drung Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index aaff15880761..5fb2326875dc 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -5,7 +5,7 @@ * Copyright (c) 2013 Samsung Electronics Co., Ltd. * http://www.samsung.com * - * SAMSUNG EXYNOS54200 SoC device nodes are listed in this file. + * SAMSUNG EXYNOS5420 SoC device nodes are listed in this file. * EXYNOS5420 based board files can include this file and provide * values for board specfic bindings. */ -- cgit From 06d536094645c703ce29d75de91eddb438d361bf Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 8 Apr 2019 07:19:25 +0200 Subject: ARM: dts: exynos: Use stdout-path property instead of console in bootargs Replacing bootargs with stdout-path property in chosen node allows using early console by adding just 'earlycon' parameter to the kernel command line. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sylwester Nawrocki --- arch/arm/boot/dts/exynos4412-trats2.dts | 3 ++- arch/arm/boot/dts/exynos5250-smdk5250.dts | 3 ++- arch/arm/boot/dts/exynos5260-xyref5260.dts | 2 +- arch/arm/boot/dts/exynos5410-smdk5410.dts | 2 +- arch/arm/boot/dts/exynos5420-smdk5420.dts | 3 ++- 5 files changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 327ee980d3a5..aac533933c61 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -22,6 +22,7 @@ }; chosen { - bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; + bootargs = "root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; + stdout-path = "serial2:115200n8"; }; }; diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index d5e66189ed2a..6dc96948a9cc 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -24,7 +24,8 @@ }; chosen { - bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; + bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M init=/linuxrc"; + stdout-path = "serial2:115200n8"; }; vdd: fixed-regulator-vdd { diff --git a/arch/arm/boot/dts/exynos5260-xyref5260.dts b/arch/arm/boot/dts/exynos5260-xyref5260.dts index fa19c59b2fb6..36a2b77eeb9d 100644 --- a/arch/arm/boot/dts/exynos5260-xyref5260.dts +++ b/arch/arm/boot/dts/exynos5260-xyref5260.dts @@ -19,7 +19,7 @@ }; chosen { - bootargs = "console=ttySAC2,115200"; + stdout-path = "serial2:115200n8"; }; fin_pll: xxti { diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts b/arch/arm/boot/dts/exynos5410-smdk5410.dts index 8fc8c841d34b..dffa5e3ed90c 100644 --- a/arch/arm/boot/dts/exynos5410-smdk5410.dts +++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts @@ -19,7 +19,7 @@ }; chosen { - bootargs = "console=ttySAC2,115200"; + stdout-path = "serial2:115200n8"; }; fin_pll: xxti { diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index 3cf905047893..8240e5186972 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -21,7 +21,8 @@ }; chosen { - bootargs = "console=ttySAC2,115200 init=/linuxrc"; + bootargs = "init=/linuxrc"; + stdout-path = "serial2:115200n8"; }; fixed-rate-clocks { -- cgit From 8cc76b1c75722196fb3d7ffe67cbfeb721a7b0e3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 8 Apr 2019 07:19:26 +0200 Subject: ARM: dts: exynos: Remove console argument from bootargs Remove the "console=ttySAC..." argument from DTSes having a proper stdout-path property. To make the code functionally equivalent, add the serial port baud rate and parity. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sylwester Nawrocki --- arch/arm/boot/dts/exynos4210-origen.dts | 4 ++-- arch/arm/boot/dts/exynos4210-smdkv310.dts | 4 ++-- arch/arm/boot/dts/exynos4210-trats.dts | 4 ++-- arch/arm/boot/dts/exynos4210-universal_c210.dts | 4 ++-- arch/arm/boot/dts/exynos4412-origen.dts | 3 +-- arch/arm/boot/dts/exynos4412-smdk4412.dts | 4 ++-- 6 files changed, 11 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index dd9ec05eb0f7..36b1edea254a 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -30,8 +30,8 @@ }; chosen { - bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; - stdout-path = &serial_2; + bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M init=/linuxrc"; + stdout-path = "serial2:115200n8"; }; mmc_reg: voltage-regulator { diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts index 7a3e621edede..77fc11e593ad 100644 --- a/arch/arm/boot/dts/exynos4210-smdkv310.dts +++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts @@ -26,8 +26,8 @@ }; chosen { - bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; - stdout-path = &serial_1; + bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M init=/linuxrc"; + stdout-path = "serial1:115200n8"; }; fixed-rate-clocks { diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 8dbc47d627a5..6882480dbaf7 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -26,8 +26,8 @@ }; chosen { - bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; - stdout-path = &serial_2; + bootargs = "root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; + stdout-path = "serial2:115200n8"; }; regulators { diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index 5c3d98654f13..07d64a8f82e3 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts @@ -24,8 +24,8 @@ }; chosen { - bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; - stdout-path = &serial_2; + bootargs = "root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; + stdout-path = "serial2:115200n8"; }; diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 346f71932457..698de4345d16 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -25,8 +25,7 @@ }; chosen { - bootargs ="console=ttySAC2,115200"; - stdout-path = &serial_2; + stdout-path = "serial2:115200n8"; }; firmware@203f000 { diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts index 5c5c2887c14f..e70fb6e601f0 100644 --- a/arch/arm/boot/dts/exynos4412-smdk4412.dts +++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts @@ -23,8 +23,8 @@ }; chosen { - bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; - stdout-path = &serial_1; + bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M init=/linuxrc"; + stdout-path = "serial1:115200n8"; }; fixed-rate-clocks { -- cgit