From 0e9ab8e4d44ae9d9aaf213bfd2c90bbe7289337b Mon Sep 17 00:00:00 2001 From: Jonathan Corbet Date: Thu, 23 Mar 2023 14:30:24 -0600 Subject: docs: move openrisc documentation under Documentation/arch/ Architecture-specific documentation is being moved into Documentation/arch/ as a way of cleaning up the top-level documentation directory and making the docs hierarchy more closely match the source hierarchy. Move Documentation/openrisc into arch/ and fix all in-tree references. Cc: Jonas Bonn Cc: Stefan Kristiansson Cc: Stafford Horne Acked-by: Alex Shi Reviewed-by: Yanteng Si Signed-off-by: Jonathan Corbet --- Documentation/arch/index.rst | 2 +- Documentation/arch/openrisc/features.rst | 3 + Documentation/arch/openrisc/index.rst | 20 ++++ Documentation/arch/openrisc/openrisc_port.rst | 121 ++++++++++++++++++++ Documentation/arch/openrisc/todo.rst | 15 +++ Documentation/openrisc/features.rst | 3 - Documentation/openrisc/index.rst | 20 ---- Documentation/openrisc/openrisc_port.rst | 121 -------------------- Documentation/openrisc/todo.rst | 15 --- Documentation/translations/zh_CN/arch/index.rst | 2 +- .../translations/zh_CN/arch/openrisc/index.rst | 32 ++++++ .../zh_CN/arch/openrisc/openrisc_port.rst | 127 +++++++++++++++++++++ .../translations/zh_CN/arch/openrisc/todo.rst | 23 ++++ .../translations/zh_CN/openrisc/index.rst | 32 ------ .../translations/zh_CN/openrisc/openrisc_port.rst | 127 --------------------- Documentation/translations/zh_CN/openrisc/todo.rst | 23 ---- MAINTAINERS | 2 +- 17 files changed, 344 insertions(+), 344 deletions(-) create mode 100644 Documentation/arch/openrisc/features.rst create mode 100644 Documentation/arch/openrisc/index.rst create mode 100644 Documentation/arch/openrisc/openrisc_port.rst create mode 100644 Documentation/arch/openrisc/todo.rst delete mode 100644 Documentation/openrisc/features.rst delete mode 100644 Documentation/openrisc/index.rst delete mode 100644 Documentation/openrisc/openrisc_port.rst delete mode 100644 Documentation/openrisc/todo.rst create mode 100644 Documentation/translations/zh_CN/arch/openrisc/index.rst create mode 100644 Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst create mode 100644 Documentation/translations/zh_CN/arch/openrisc/todo.rst delete mode 100644 Documentation/translations/zh_CN/openrisc/index.rst delete mode 100644 Documentation/translations/zh_CN/openrisc/openrisc_port.rst delete mode 100644 Documentation/translations/zh_CN/openrisc/todo.rst diff --git a/Documentation/arch/index.rst b/Documentation/arch/index.rst index 792f58e30f25..65945daa40fe 100644 --- a/Documentation/arch/index.rst +++ b/Documentation/arch/index.rst @@ -17,7 +17,7 @@ implementation. ../m68k/index ../mips/index ../nios2/index - ../openrisc/index + openrisc/index ../parisc/index ../powerpc/index ../riscv/index diff --git a/Documentation/arch/openrisc/features.rst b/Documentation/arch/openrisc/features.rst new file mode 100644 index 000000000000..3f7c40d219f2 --- /dev/null +++ b/Documentation/arch/openrisc/features.rst @@ -0,0 +1,3 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. kernel-feat:: $srctree/Documentation/features openrisc diff --git a/Documentation/arch/openrisc/index.rst b/Documentation/arch/openrisc/index.rst new file mode 100644 index 000000000000..6879f998b87a --- /dev/null +++ b/Documentation/arch/openrisc/index.rst @@ -0,0 +1,20 @@ +.. SPDX-License-Identifier: GPL-2.0 + +===================== +OpenRISC Architecture +===================== + +.. toctree:: + :maxdepth: 2 + + openrisc_port + todo + + features + +.. only:: subproject and html + + Indices + ======= + + * :ref:`genindex` diff --git a/Documentation/arch/openrisc/openrisc_port.rst b/Documentation/arch/openrisc/openrisc_port.rst new file mode 100644 index 000000000000..657ac4af7be6 --- /dev/null +++ b/Documentation/arch/openrisc/openrisc_port.rst @@ -0,0 +1,121 @@ +============== +OpenRISC Linux +============== + +This is a port of Linux to the OpenRISC class of microprocessors; the initial +target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k). + +For information about OpenRISC processors and ongoing development: + + ======= ============================= + website https://openrisc.io + email openrisc@lists.librecores.org + ======= ============================= + +--------------------------------------------------------------------- + +Build instructions for OpenRISC toolchain and Linux +=================================================== + +In order to build and run Linux for OpenRISC, you'll need at least a basic +toolchain and, perhaps, the architectural simulator. Steps to get these bits +in place are outlined here. + +1) Toolchain + +Toolchain binaries can be obtained from openrisc.io or our github releases page. +Instructions for building the different toolchains can be found on openrisc.io +or Stafford's toolchain build and release scripts. + + ========== ================================================= + binaries https://github.com/openrisc/or1k-gcc/releases + toolchains https://openrisc.io/software + building https://github.com/stffrdhrn/or1k-toolchain-build + ========== ================================================= + +2) Building + +Build the Linux kernel as usual:: + + make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig + make ARCH=openrisc CROSS_COMPILE="or1k-linux-" + +3) Running on FPGA (optional) + +The OpenRISC community typically uses FuseSoC to manage building and programming +an SoC into an FPGA. The below is an example of programming a De0 Nano +development board with the OpenRISC SoC. During the build FPGA RTL is code +downloaded from the FuseSoC IP cores repository and built using the FPGA vendor +tools. Binaries are loaded onto the board with openocd. + +:: + + git clone https://github.com/olofk/fusesoc + cd fusesoc + sudo pip install -e . + + fusesoc init + fusesoc build de0_nano + fusesoc pgm de0_nano + + openocd -f interface/altera-usb-blaster.cfg \ + -f board/or1k_generic.cfg + + telnet localhost 4444 + > init + > halt; load_image vmlinux ; reset + +4) Running on a Simulator (optional) + +QEMU is a processor emulator which we recommend for simulating the OpenRISC +platform. Please follow the OpenRISC instructions on the QEMU website to get +Linux running on QEMU. You can build QEMU yourself, but your Linux distribution +likely provides binary packages to support OpenRISC. + + ============= ====================================================== + qemu openrisc https://wiki.qemu.org/Documentation/Platforms/OpenRISC + ============= ====================================================== + +--------------------------------------------------------------------- + +Terminology +=========== + +In the code, the following particles are used on symbols to limit the scope +to more or less specific processor implementations: + +========= ======================================= +openrisc: the OpenRISC class of processors +or1k: the OpenRISC 1000 family of processors +or1200: the OpenRISC 1200 processor +========= ======================================= + +--------------------------------------------------------------------- + +History +======== + +18-11-2003 Matjaz Breskvar (phoenix@bsemi.com) + initial port of linux to OpenRISC/or32 architecture. + all the core stuff is implemented and seams usable. + +08-12-2003 Matjaz Breskvar (phoenix@bsemi.com) + complete change of TLB miss handling. + rewrite of exceptions handling. + fully functional sash-3.6 in default initrd. + a much improved version with changes all around. + +10-04-2004 Matjaz Breskvar (phoenix@bsemi.com) + alot of bugfixes all over. + ethernet support, functional http and telnet servers. + running many standard linux apps. + +26-06-2004 Matjaz Breskvar (phoenix@bsemi.com) + port to 2.6.x + +30-11-2004 Matjaz Breskvar (phoenix@bsemi.com) + lots of bugfixes and enhancments. + added opencores framebuffer driver. + +09-10-2010 Jonas Bonn (jonas@southpole.se) + major rewrite to bring up to par with upstream Linux 2.6.36 diff --git a/Documentation/arch/openrisc/todo.rst b/Documentation/arch/openrisc/todo.rst new file mode 100644 index 000000000000..420b18b87eda --- /dev/null +++ b/Documentation/arch/openrisc/todo.rst @@ -0,0 +1,15 @@ +==== +TODO +==== + +The OpenRISC Linux port is fully functional and has been tracking upstream +since 2.6.35. There are, however, remaining items to be completed within +the coming months. Here's a list of known-to-be-less-than-stellar items +that are due for investigation shortly, i.e. our TODO list: + +- Implement the rest of the DMA API... dma_map_sg, etc. + +- Finish the renaming cleanup... there are references to or32 in the code + which was an older name for the architecture. The name we've settled on is + or1k and this change is slowly trickling through the stack. For the time + being, or32 is equivalent to or1k. diff --git a/Documentation/openrisc/features.rst b/Documentation/openrisc/features.rst deleted file mode 100644 index 3f7c40d219f2..000000000000 --- a/Documentation/openrisc/features.rst +++ /dev/null @@ -1,3 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -.. kernel-feat:: $srctree/Documentation/features openrisc diff --git a/Documentation/openrisc/index.rst b/Documentation/openrisc/index.rst deleted file mode 100644 index 6879f998b87a..000000000000 --- a/Documentation/openrisc/index.rst +++ /dev/null @@ -1,20 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -===================== -OpenRISC Architecture -===================== - -.. toctree:: - :maxdepth: 2 - - openrisc_port - todo - - features - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/openrisc/openrisc_port.rst b/Documentation/openrisc/openrisc_port.rst deleted file mode 100644 index 657ac4af7be6..000000000000 --- a/Documentation/openrisc/openrisc_port.rst +++ /dev/null @@ -1,121 +0,0 @@ -============== -OpenRISC Linux -============== - -This is a port of Linux to the OpenRISC class of microprocessors; the initial -target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k). - -For information about OpenRISC processors and ongoing development: - - ======= ============================= - website https://openrisc.io - email openrisc@lists.librecores.org - ======= ============================= - ---------------------------------------------------------------------- - -Build instructions for OpenRISC toolchain and Linux -=================================================== - -In order to build and run Linux for OpenRISC, you'll need at least a basic -toolchain and, perhaps, the architectural simulator. Steps to get these bits -in place are outlined here. - -1) Toolchain - -Toolchain binaries can be obtained from openrisc.io or our github releases page. -Instructions for building the different toolchains can be found on openrisc.io -or Stafford's toolchain build and release scripts. - - ========== ================================================= - binaries https://github.com/openrisc/or1k-gcc/releases - toolchains https://openrisc.io/software - building https://github.com/stffrdhrn/or1k-toolchain-build - ========== ================================================= - -2) Building - -Build the Linux kernel as usual:: - - make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig - make ARCH=openrisc CROSS_COMPILE="or1k-linux-" - -3) Running on FPGA (optional) - -The OpenRISC community typically uses FuseSoC to manage building and programming -an SoC into an FPGA. The below is an example of programming a De0 Nano -development board with the OpenRISC SoC. During the build FPGA RTL is code -downloaded from the FuseSoC IP cores repository and built using the FPGA vendor -tools. Binaries are loaded onto the board with openocd. - -:: - - git clone https://github.com/olofk/fusesoc - cd fusesoc - sudo pip install -e . - - fusesoc init - fusesoc build de0_nano - fusesoc pgm de0_nano - - openocd -f interface/altera-usb-blaster.cfg \ - -f board/or1k_generic.cfg - - telnet localhost 4444 - > init - > halt; load_image vmlinux ; reset - -4) Running on a Simulator (optional) - -QEMU is a processor emulator which we recommend for simulating the OpenRISC -platform. Please follow the OpenRISC instructions on the QEMU website to get -Linux running on QEMU. You can build QEMU yourself, but your Linux distribution -likely provides binary packages to support OpenRISC. - - ============= ====================================================== - qemu openrisc https://wiki.qemu.org/Documentation/Platforms/OpenRISC - ============= ====================================================== - ---------------------------------------------------------------------- - -Terminology -=========== - -In the code, the following particles are used on symbols to limit the scope -to more or less specific processor implementations: - -========= ======================================= -openrisc: the OpenRISC class of processors -or1k: the OpenRISC 1000 family of processors -or1200: the OpenRISC 1200 processor -========= ======================================= - ---------------------------------------------------------------------- - -History -======== - -18-11-2003 Matjaz Breskvar (phoenix@bsemi.com) - initial port of linux to OpenRISC/or32 architecture. - all the core stuff is implemented and seams usable. - -08-12-2003 Matjaz Breskvar (phoenix@bsemi.com) - complete change of TLB miss handling. - rewrite of exceptions handling. - fully functional sash-3.6 in default initrd. - a much improved version with changes all around. - -10-04-2004 Matjaz Breskvar (phoenix@bsemi.com) - alot of bugfixes all over. - ethernet support, functional http and telnet servers. - running many standard linux apps. - -26-06-2004 Matjaz Breskvar (phoenix@bsemi.com) - port to 2.6.x - -30-11-2004 Matjaz Breskvar (phoenix@bsemi.com) - lots of bugfixes and enhancments. - added opencores framebuffer driver. - -09-10-2010 Jonas Bonn (jonas@southpole.se) - major rewrite to bring up to par with upstream Linux 2.6.36 diff --git a/Documentation/openrisc/todo.rst b/Documentation/openrisc/todo.rst deleted file mode 100644 index 420b18b87eda..000000000000 --- a/Documentation/openrisc/todo.rst +++ /dev/null @@ -1,15 +0,0 @@ -==== -TODO -==== - -The OpenRISC Linux port is fully functional and has been tracking upstream -since 2.6.35. There are, however, remaining items to be completed within -the coming months. Here's a list of known-to-be-less-than-stellar items -that are due for investigation shortly, i.e. our TODO list: - -- Implement the rest of the DMA API... dma_map_sg, etc. - -- Finish the renaming cleanup... there are references to or32 in the code - which was an older name for the architecture. The name we've settled on is - or1k and this change is slowly trickling through the stack. For the time - being, or32 is equivalent to or1k. diff --git a/Documentation/translations/zh_CN/arch/index.rst b/Documentation/translations/zh_CN/arch/index.rst index aa53dcff268e..7e59af567331 100644 --- a/Documentation/translations/zh_CN/arch/index.rst +++ b/Documentation/translations/zh_CN/arch/index.rst @@ -11,7 +11,7 @@ ../mips/index ../arm64/index ../riscv/index - ../openrisc/index + openrisc/index ../parisc/index ../loongarch/index diff --git a/Documentation/translations/zh_CN/arch/openrisc/index.rst b/Documentation/translations/zh_CN/arch/openrisc/index.rst new file mode 100644 index 000000000000..da21f8ab894b --- /dev/null +++ b/Documentation/translations/zh_CN/arch/openrisc/index.rst @@ -0,0 +1,32 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../../disclaimer-zh_CN.rst + +:Original: Documentation/arch/openrisc/index.rst + +:翻译: + + 司延腾 Yanteng Si + +.. _cn_openrisc_index: + +================= +OpenRISC 体系架构 +================= + +.. toctree:: + :maxdepth: 2 + + openrisc_port + todo + +Todolist: + features + + +.. only:: subproject and html + + Indices + ======= + + * :ref:`genindex` diff --git a/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst b/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst new file mode 100644 index 000000000000..cadc580fa23b --- /dev/null +++ b/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst @@ -0,0 +1,127 @@ +.. include:: ../../disclaimer-zh_CN.rst + +:Original: Documentation/arch/openrisc/openrisc_port.rst + +:翻译: + + 司延腾 Yanteng Si + +.. _cn_openrisc_port: + +============== +OpenRISC Linux +============== + +这是Linux对OpenRISC类微处理器的移植；具体来说，最早移植目标是32位 +OpenRISC 1000系列（或1k）。 + +关于OpenRISC处理器和正在进行中的开发的信息: + + ======= ============================= + 网站 https://openrisc.io + 邮箱 openrisc@lists.librecores.org + ======= ============================= + +--------------------------------------------------------------------- + +OpenRISC工具链和Linux的构建指南 +=============================== + +为了构建和运行Linux for OpenRISC，你至少需要一个基本的工具链，或许 +还需要架构模拟器。 这里概述了准备就位这些部分的步骤。 + +1) 工具链 + +工具链二进制文件可以从openrisc.io或我们的github发布页面获得。不同 +工具链的构建指南可以在openrisc.io或Stafford的工具链构建和发布脚本 +中找到。 + + ====== ================================================= + 二进制 https://github.com/openrisc/or1k-gcc/releases + 工具链 https://openrisc.io/software + 构建 https://github.com/stffrdhrn/or1k-toolchain-build + ====== ================================================= + +2) 构建 + +像往常一样构建Linux内核:: + + make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig + make ARCH=openrisc CROSS_COMPILE="or1k-linux-" + +3) 在FPGA上运行（可选) + +OpenRISC社区通常使用FuseSoC来管理构建和编程SoC到FPGA中。 下面是用 +OpenRISC SoC对De0 Nano开发板进行编程的一个例子。 在构建过程中， +FPGA RTL是从FuseSoC IP核库中下载的代码，并使用FPGA供应商工具构建。 +二进制文件用openocd加载到电路板上。 + +:: + + git clone https://github.com/olofk/fusesoc + cd fusesoc + sudo pip install -e . + + fusesoc init + fusesoc build de0_nano + fusesoc pgm de0_nano + + openocd -f interface/altera-usb-blaster.cfg \ + -f board/or1k_generic.cfg + + telnet localhost 4444 + > init + > halt; load_image vmlinux ; reset + +4) 在模拟器上运行（可选） + +QEMU是一个处理器仿真器，我们推荐它来模拟OpenRISC平台。 请按照QEMU网 +站上的OpenRISC说明，让Linux在QEMU上运行。 你可以自己构建QEMU，但你的 +Linux发行版可能提供了支持OpenRISC的二进制包。 + + ============= ====================================================== + qemu openrisc https://wiki.qemu.org/Documentation/Platforms/OpenRISC + ============= ====================================================== + +--------------------------------------------------------------------- + +术语表 +====== + +代码中使用了以下符号约定以将范围限制在几个特定处理器实现上： + +========= ======================= +openrisc: OpenRISC类型处理器 +or1k: OpenRISC 1000系列处理器 +or1200: OpenRISC 1200处理器 +========= ======================= + +--------------------------------------------------------------------- + +历史 +==== + +2003-11-18 Matjaz Breskvar (phoenix@bsemi.com) + 将linux初步移植到OpenRISC或32架构。 + 所有的核心功能都实现了，并且可以使用。 + +2003-12-08 Matjaz Breskvar (phoenix@bsemi.com) + 彻底改变TLB失误处理。 + 重写异常处理。 + 在默认的initrd中实现了sash-3.6的所有功能。 + 大幅改进的版本。 + +2004-04-10 Matjaz Breskvar (phoenix@bsemi.com) + 大量的bug修复。 + 支持以太网，http和telnet服务器功能。 + 可以运行许多标准的linux应用程序。 + +2004-06-26 Matjaz Breskvar (phoenix@bsemi.com) + 移植到2.6.x。 + +2004-11-30 Matjaz Breskvar (phoenix@bsemi.com) + 大量的bug修复和增强功能。 + 增加了opencores framebuffer驱动。 + +2010-10-09 Jonas Bonn (jonas@southpole.se) + 重大重写，使其与上游的Linux 2.6.36看齐。 diff --git a/Documentation/translations/zh_CN/arch/openrisc/todo.rst b/Documentation/translations/zh_CN/arch/openrisc/todo.rst new file mode 100644 index 000000000000..1f6f95616633 --- /dev/null +++ b/Documentation/translations/zh_CN/arch/openrisc/todo.rst @@ -0,0 +1,23 @@ +.. include:: ../../disclaimer-zh_CN.rst + +:Original: Documentation/arch/openrisc/todo.rst + +:翻译: + + 司延腾 Yanteng Si + +.. _cn_openrisc_todo.rst: + +======== +待办事项 +======== + +OpenRISC Linux的移植已经完全投入使用，并且从 2.6.35 开始就一直在上游同步。 +然而，还有一些剩余的项目需要在未来几个月内完成。 下面是一个即将进行调查的已知 +不尽完美的项目列表，即我们的待办事项列表。 + +- 实现其余的DMA API……dma_map_sg等。 + +- 完成重命名清理工作……代码中提到了or32，这是架构的一个老名字。 我们 + 已经确定的名字是or1k，这个改变正在以缓慢积累的方式进行。 目前，or32相当 + 于or1k。 diff --git a/Documentation/translations/zh_CN/openrisc/index.rst b/Documentation/translations/zh_CN/openrisc/index.rst deleted file mode 100644 index 9ad6cc600884..000000000000 --- a/Documentation/translations/zh_CN/openrisc/index.rst +++ /dev/null @@ -1,32 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -.. include:: ../disclaimer-zh_CN.rst - -:Original: Documentation/openrisc/index.rst - -:翻译: - - 司延腾 Yanteng Si - -.. _cn_openrisc_index: - -================= -OpenRISC 体系架构 -================= - -.. toctree:: - :maxdepth: 2 - - openrisc_port - todo - -Todolist: - features - - -.. only:: subproject and html - - Indices - ======= - - * :ref:`genindex` diff --git a/Documentation/translations/zh_CN/openrisc/openrisc_port.rst b/Documentation/translations/zh_CN/openrisc/openrisc_port.rst deleted file mode 100644 index b8a67670492d..000000000000 --- a/Documentation/translations/zh_CN/openrisc/openrisc_port.rst +++ /dev/null @@ -1,127 +0,0 @@ -.. include:: ../disclaimer-zh_CN.rst - -:Original: Documentation/openrisc/openrisc_port.rst - -:翻译: - - 司延腾 Yanteng Si - -.. _cn_openrisc_port: - -============== -OpenRISC Linux -============== - -这是Linux对OpenRISC类微处理器的移植；具体来说，最早移植目标是32位 -OpenRISC 1000系列（或1k）。 - -关于OpenRISC处理器和正在进行中的开发的信息: - - ======= ============================= - 网站 https://openrisc.io - 邮箱 openrisc@lists.librecores.org - ======= ============================= - ---------------------------------------------------------------------- - -OpenRISC工具链和Linux的构建指南 -=============================== - -为了构建和运行Linux for OpenRISC，你至少需要一个基本的工具链，或许 -还需要架构模拟器。 这里概述了准备就位这些部分的步骤。 - -1) 工具链 - -工具链二进制文件可以从openrisc.io或我们的github发布页面获得。不同 -工具链的构建指南可以在openrisc.io或Stafford的工具链构建和发布脚本 -中找到。 - - ====== ================================================= - 二进制 https://github.com/openrisc/or1k-gcc/releases - 工具链 https://openrisc.io/software - 构建 https://github.com/stffrdhrn/or1k-toolchain-build - ====== ================================================= - -2) 构建 - -像往常一样构建Linux内核:: - - make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig - make ARCH=openrisc CROSS_COMPILE="or1k-linux-" - -3) 在FPGA上运行（可选) - -OpenRISC社区通常使用FuseSoC来管理构建和编程SoC到FPGA中。 下面是用 -OpenRISC SoC对De0 Nano开发板进行编程的一个例子。 在构建过程中， -FPGA RTL是从FuseSoC IP核库中下载的代码，并使用FPGA供应商工具构建。 -二进制文件用openocd加载到电路板上。 - -:: - - git clone https://github.com/olofk/fusesoc - cd fusesoc - sudo pip install -e . - - fusesoc init - fusesoc build de0_nano - fusesoc pgm de0_nano - - openocd -f interface/altera-usb-blaster.cfg \ - -f board/or1k_generic.cfg - - telnet localhost 4444 - > init - > halt; load_image vmlinux ; reset - -4) 在模拟器上运行（可选） - -QEMU是一个处理器仿真器，我们推荐它来模拟OpenRISC平台。 请按照QEMU网 -站上的OpenRISC说明，让Linux在QEMU上运行。 你可以自己构建QEMU，但你的 -Linux发行版可能提供了支持OpenRISC的二进制包。 - - ============= ====================================================== - qemu openrisc https://wiki.qemu.org/Documentation/Platforms/OpenRISC - ============= ====================================================== - ---------------------------------------------------------------------- - -术语表 -====== - -代码中使用了以下符号约定以将范围限制在几个特定处理器实现上： - -========= ======================= -openrisc: OpenRISC类型处理器 -or1k: OpenRISC 1000系列处理器 -or1200: OpenRISC 1200处理器 -========= ======================= - ---------------------------------------------------------------------- - -历史 -==== - -2003-11-18 Matjaz Breskvar (phoenix@bsemi.com) - 将linux初步移植到OpenRISC或32架构。 - 所有的核心功能都实现了，并且可以使用。 - -2003-12-08 Matjaz Breskvar (phoenix@bsemi.com) - 彻底改变TLB失误处理。 - 重写异常处理。 - 在默认的initrd中实现了sash-3.6的所有功能。 - 大幅改进的版本。 - -2004-04-10 Matjaz Breskvar (phoenix@bsemi.com) - 大量的bug修复。 - 支持以太网，http和telnet服务器功能。 - 可以运行许多标准的linux应用程序。 - -2004-06-26 Matjaz Breskvar (phoenix@bsemi.com) - 移植到2.6.x。 - -2004-11-30 Matjaz Breskvar (phoenix@bsemi.com) - 大量的bug修复和增强功能。 - 增加了opencores framebuffer驱动。 - -2010-10-09 Jonas Bonn (jonas@southpole.se) - 重大重写，使其与上游的Linux 2.6.36看齐。 diff --git a/Documentation/translations/zh_CN/openrisc/todo.rst b/Documentation/translations/zh_CN/openrisc/todo.rst deleted file mode 100644 index 63c38717edb1..000000000000 --- a/Documentation/translations/zh_CN/openrisc/todo.rst +++ /dev/null @@ -1,23 +0,0 @@ -.. include:: ../disclaimer-zh_CN.rst - -:Original: Documentation/openrisc/todo.rst - -:翻译: - - 司延腾 Yanteng Si - -.. _cn_openrisc_todo.rst: - -======== -待办事项 -======== - -OpenRISC Linux的移植已经完全投入使用，并且从 2.6.35 开始就一直在上游同步。 -然而，还有一些剩余的项目需要在未来几个月内完成。 下面是一个即将进行调查的已知 -不尽完美的项目列表，即我们的待办事项列表。 - -- 实现其余的DMA API……dma_map_sg等。 - -- 完成重命名清理工作……代码中提到了or32，这是架构的一个老名字。 我们 - 已经确定的名字是or1k，这个改变正在以缓慢积累的方式进行。 目前，or32相当 - 于or1k。 diff --git a/MAINTAINERS b/MAINTAINERS index cf4eb913ea12..64ea94536f4c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15638,7 +15638,7 @@ S: Maintained W: http://openrisc.io T: git https://github.com/openrisc/linux.git F: Documentation/devicetree/bindings/openrisc/ -F: Documentation/openrisc/ +F: Documentation/arch/openrisc/ F: arch/openrisc/ F: drivers/irqchip/irq-ompic.c F: drivers/irqchip/irq-or1k-* -- cgit