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2024-06-25perf unwind-libunwind: Add malloc() failure handlingYunseong Kim1-0/+5
Add malloc() failure handling in unread_unwind_spec_debug_frame(). This make caller find_proc_info() works well when the allocation failure. Signed-off-by: Yunseong Kim <[email protected]> Reviewed-by: Ian Rogers <[email protected]> Cc: Ravi Bangoria <[email protected]> Cc: Austin Kim <[email protected]> Cc: [email protected] Cc: Ze Gao <[email protected]> Cc: Leo Yan <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-25util: constant -1 with expression of type charYunseong Kim1-1/+1
This patch resolve following warning. tools/perf/util/evsel.c:1620:9: error: result of comparison of constant -1 with expression of type 'char' is always false -Werror,-Wtautological-constant-out-of-range-compare 1620 | if (c == -1) | ~ ^ ~~ Signed-off-by: Yunseong Kim <[email protected]> Reviewed-by: Ian Rogers <[email protected]> Cc: Ravi Bangoria <[email protected]> Cc: Austin Kim <[email protected]> Cc: [email protected] Cc: Ze Gao <[email protected]> Cc: Leo Yan <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-25perf: Timehist account sch delay for scheduled out runningFernand Sieber2-3/+6
When using perf timehist, sch delay is only computed for a waking task, not for a pre empted task. This patches changes sch delay to account for both. This makes sense as testing scheduling policy need to consider the effect of scheduling delay globally, not only for waking tasks. Example of `perf timehist` report before the patch for `stress` task competing with each other. First column is wait time, second column sch delay, third column runtime. 1.492060 [0000] s stress[81] 1.999 0.000 2.000 R next: stress[83] 1.494060 [0000] s stress[83] 2.000 0.000 2.000 R next: stress[81] 1.496060 [0000] s stress[81] 2.000 0.000 2.000 R next: stress[83] 1.498060 [0000] s stress[83] 2.000 0.000 1.999 R next: stress[81] After the patch, it looks like this (note that all wait time is not zero anymore): 1.492060 [0000] s stress[81] 1.999 1.999 2.000 R next: stress[83] 1.494060 [0000] s stress[83] 2.000 2.000 2.000 R next: stress[81] 1.496060 [0000] s stress[81] 2.000 2.000 2.000 R next: stress[83] 1.498060 [0000] s stress[83] 2.000 2.000 1.999 R next: stress[81] Signed-off-by: Fernand Sieber <[email protected]> Reviewed-by: Madadi Vineeth Reddy <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-25perf tests: Add APX and other new instructions to x86 instruction decoder testAdrian Hunter3-0/+1739
Add samples of APX and other new instructions to the 'x86 instruction decoder - new instructions' test. Note the test is only available if the perf tool has been built with EXTRA_TESTS=1. Example: $ make EXTRA_TESTS=1 -C tools/perf $ tools/perf/perf test -F -v 'new ins' |& grep -i 'jmpabs\|popp\|pushp' Decoded ok: d5 00 a1 ef cd ab 90 78 56 34 12 jmpabs $0x1234567890abcdef Decoded ok: d5 08 53 pushp %rbx Decoded ok: d5 18 50 pushp %r16 Decoded ok: d5 19 57 pushp %r31 Decoded ok: d5 19 5f popp %r31 Decoded ok: d5 18 58 popp %r16 Decoded ok: d5 08 5b popp %rbx Signed-off-by: Adrian Hunter <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Chang S. Bae <[email protected]> Cc: Masami Hiramatsu <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Dave Hansen <[email protected]> Cc: Nikolay Borisov <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: [email protected] Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-25perf intel pt: Add new JMPABS instruction to the Intel PT instruction decoderAdrian Hunter1-0/+9
JMPABS is 64-bit absolute direct jump instruction, encoded with a mandatory REX2 prefix. JMPABS is designed to be used in the procedure linkage table (PLT) to replace indirect jumps, because it has better performance. In that case the jump target will be amended at run time. To enable Intel PT to follow the code, a TIP packet is always emitted when JMPABS is traced under Intel PT. Refer to the Intel Advanced Performance Extensions (Intel APX) Architecture Specification for details. Decode JMPABS as an indirect jump, because it has an associated TIP packet the same as an indirect jump and the control flow should follow the TIP packet payload, and not assume it is the same as the on-file object code JMPABS target address. Signed-off-by: Adrian Hunter <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Chang S. Bae <[email protected]> Cc: Masami Hiramatsu <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Dave Hansen <[email protected]> Cc: Nikolay Borisov <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: [email protected] Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-25perf test: Check output of the probe ... --funcs commandChaitanya S Prakash1-1/+1
Test "perf probe of function from different CU" only checks if the perf command has failed and doesn't test the --funcs output. In the issue reported in the previous commit, the garbage output of the --funcs command was being ignored by the test when it could have been caught. The script first makes use of --funcs option with the perf probe command to check if the function "foo" exists in the testfile before adding a probe to it in the next command. The output of probe...--funcs command is redirected to stdout, therefore, add '| grep "foo"' to validate the result. Signed-off-by: Chaitanya S Prakash <[email protected]> Reviewed-by: Masami Hiramatsu (Google) <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-25tools/perf: Fix parallel-perf python script to replace new python syntax ↵Athira Rajeev1-1/+2
":=" usage perf test "perf script tests" fails as below in systems with python 3.6 File "/home/athira/linux/tools/perf/tests/shell/../../scripts/python/parallel-perf.py", line 442 if line := p.stdout.readline(): ^ SyntaxError: invalid syntax --- Cleaning up --- ---- end(-1) ---- 92: perf script tests: FAILED! This happens because ":=" is a new syntax that assigns values to variables as part of a larger expression. This is introduced from python 3.8 and hence fails in setup with python 3.6 Address this by splitting the large expression and check the value in two steps: Previous line: if line := p.stdout.readline(): Current change: line = p.stdout.readline() if line: With patch ./perf test "perf script tests" 93: perf script tests: Ok Signed-off-by: Athira Rajeev <[email protected]> Acked-by: Adrian Hunter <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-25tools/perf: Use is_perf_pid_map_name helper function to check dso's of ↵Athira Rajeev2-2/+2
pattern /tmp/perf-%d.map commit 80d496be89ed ("perf report: Add support for profiling JIT generated code") added support for profiling JIT generated code. This patch handles dso's of form "/tmp/perf-$PID.map". Some of the references doesn't check exactly for same pattern. some uses "if (!strncmp(dso_name, "/tmp/perf-", 10))". Fix this by using helper function perf_pid_map_tid and is_perf_pid_map_name which looks for proper pattern of form: "/tmp/perf-$PID.map" for these checks. Signed-off-by: Athira Rajeev <[email protected]> Reviewed-by: Adrian Hunter <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-25tools/perf: Fix the string match for "/tmp/perf-$PID.map" files in dso__loadAthira Rajeev3-1/+18
Perf test for perf probe of function from different CU fails as below: ./perf test -vv "test perf probe of function from different CU" 116: test perf probe of function from different CU: --- start --- test child forked, pid 2679 Failed to find symbol foo in /tmp/perf-uprobe-different-cu-sh.Msa7iy89bx/testfile Error: Failed to add events. --- Cleaning up --- "foo" does not hit any event. Error: Failed to delete events. ---- end(-1) ---- 116: test perf probe of function from different CU : FAILED! The test does below to probe function "foo" : # gcc -g -Og -flto -c /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7/testfile-foo.c -o /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7/testfile-foo.o # gcc -g -Og -c /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7/testfile-main.c -o /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7/testfile-main.o # gcc -g -Og -o /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7/testfile /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7/testfile-foo.o /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7/testfile-main.o # ./perf probe -x /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7/testfile foo Failed to find symbol foo in /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7/testfile Error: Failed to add events. Perf probe fails to find symbol foo in the executable placed in /tmp/perf-uprobe-different-cu-sh.XniNxNEVT7 Simple reproduce: # mktemp -d /tmp/perf-checkXXXXXXXXXX /tmp/perf-checkcWpuLRQI8j # gcc -g -o test test.c # cp test /tmp/perf-checkcWpuLRQI8j/ # nm /tmp/perf-checkcWpuLRQI8j/test | grep foo 00000000100006bc T foo # ./perf probe -x /tmp/perf-checkcWpuLRQI8j/test foo Failed to find symbol foo in /tmp/perf-checkcWpuLRQI8j/test Error: Failed to add events. But it works with any files like /tmp/perf/test. Only for patterns with "/tmp/perf-", this fails. Further debugging, commit 80d496be89ed ("perf report: Add support for profiling JIT generated code") added support for profiling JIT generated code. This patch handles dso's of form "/tmp/perf-$PID.map" . The check used "if (strncmp(self->name, "/tmp/perf-", 10) == 0)" to match "/tmp/perf-$PID.map". With this commit, any dso in /tmp/perf- folder will be considered separately for processing (not only JIT created map files ). Fix this by changing the string pattern to check for "/tmp/perf-%d.map". Add a helper function is_perf_pid_map_name to do this check. In "struct dso", dso->long_name holds the long name of the dso file. Since the /tmp/perf-$PID.map check uses the complete name, use dso___long_name for the string name. With the fix, # ./perf test "test perf probe of function from different CU" 117: test perf probe of function from different CU : Ok Fixes: 56cbeacf1435 ("perf probe: Add test for regression introduced by switch to die_get_decl_file()") Signed-off-by: Athira Rajeev <[email protected]> Reviewed-by: Chaitanya S Prakash <[email protected]> Reviewed-by: Adrian Hunter <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-24perf test: Make test_arm_callgraph_fp.sh more robustJames Clark2-21/+26
The 2 second sleep can cause the test to fail on very slow network file systems because Perf ends up being killed before it finishes starting up. Fix it by making the leafloop workload end after a fixed time like the other workloads so there is no need to kill it after 2 seconds. Also remove the 1 second start sampling delay because it is similarly fragile. Instead, search through all samples for a matching one, rather than just checking the first sample and hoping it's in the right place. Fixes: cd6382d82752 ("perf test arm64: Test unwinding using fame-pointer (fp) mode") Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Cc: German Gomez <[email protected]> Cc: Spoorthy S <[email protected]> Cc: Kajol Jain <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-21perf build: Ensure libtraceevent and libtracefs versions have 3 componentsGuilherme Amadio1-2/+2
When either of these have a shorter version, like 1.8, the expression that computes the version has a syntax error that can be seen in the output of make: expr: syntax error: missing argument after + Link: https://bugs.gentoo.org/917559 Reported-by: Peter Volkov <[email protected]> Signed-off-by: Guilherme Amadio <[email protected]> Reviewed-by: Leo Yan <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-21perf build: Use pkg-config for feature check for libtrace{event,fs}Guilherme Amadio1-14/+13
Needed to add required include directories for the feature detection to succeed. The header tracefs.h is installed either into the include directory /usr/include/tracefs/tracefs.h when using the Makefile, or into /usr/include/libtracefs/tracefs.h when using meson to build libtracefs. The header tracefs.h uses #include <event-parse.h> from libtraceevent, so pkg-config needs to pick the correct include directory for libtracefs and add the one for libtraceevent to succeed. Note that in baa2ca59ec1e31ccbe3f24ff0368152b36f68720 the variable LIBTRACEEVENT_DIR was introduced, and now the method to compile against non-standard locations requires PKG_CONFIG_PATH to be set instead, which works for both libtraceevent and libtracefs. Signed-off-by: Guilherme Amadio <[email protected]> Reviewed-by: Leo Yan <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-21perf arm: Workaround ARM PMUs cpu maps having offline cpusIan Rogers1-2/+8
When PMUs have a cpu map in the 'cpus' or 'cpumask' file, perf will try to open events on those CPUs. ARM doesn't remove offline CPUs meaning taking a CPU offline will cause perf commands to fail unless a CPU map is passed on the command line. More context in: https://lore.kernel.org/lkml/[email protected]/ Reported-by: Yicong Yang <[email protected]> Closes: https://lore.kernel.org/lkml/[email protected]/ Signed-off-by: Ian Rogers <[email protected]> Tested-by: Yicong Yang <[email protected]> Tested-by: Leo Yan <[email protected]> Cc: James Clark <[email protected]> Cc: Suzuki K Poulose <[email protected]> Cc: Will Deacon <[email protected]> Cc: Mike Leach <[email protected]> Cc: Leo Yan <[email protected]> Cc: [email protected] Cc: [email protected] Cc: John Garry <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-21perf stat: Fix the hard-coded metrics calculation on the hybridKan Liang1-0/+7
The hard-coded metrics is wrongly calculated on the hybrid machine. $ perf stat -e cycles,instructions -a sleep 1 Performance counter stats for 'system wide': 18,205,487 cpu_atom/cycles/ 9,733,603 cpu_core/cycles/ 9,423,111 cpu_atom/instructions/ # 0.52 insn per cycle 4,268,965 cpu_core/instructions/ # 0.23 insn per cycle The insn per cycle for cpu_core should be 4,268,965 / 9,733,603 = 0.44. When finding the metric events, the find_stat() doesn't take the PMU type into account. The cpu_atom/cycles/ is wrongly used to calculate the IPC of the cpu_core. In the hard-coded metrics, the events from a different PMU are only SW_CPU_CLOCK and SW_TASK_CLOCK. They both have the stat type, STAT_NSECS. Except the SW CLOCK events, check the PMU type as well. Fixes: 0a57b910807a ("perf stat: Use counts rather than saved_value") Reported-by: Khalil, Amiri <[email protected]> Reviewed-by: Ian Rogers <[email protected]> Signed-off-by: Kan Liang <[email protected]> Acked-by: Namhyung Kim <[email protected]> Cc: [email protected] Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add westmereex counter informationIan Rogers8-0/+586
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add westmereep-sp counter informationIan Rogers8-0/+583
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add westmereep-dp counter informationIan Rogers8-0/+549
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add/update tigerlake events/metricsIan Rogers14-80/+446
Update events from v1.15 to v1.16. Update TMA metrics from v4.7 to v4.8. Bring in the event updates v1.16: https://github.com/intel/perfmon/commit/43f3b8d6f82f3174bd3bffe8587e2179f086d2ce The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Add counter information. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add snowridgex counter informationIan Rogers14-25/+5177
Update/remove events as per v1.23: https://github.com/intel/perfmon/commit/9debd874e1b2b0cca42b9ba2342cacaaace2f0ce Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add/update skylakex events/metricsIan Rogers16-189/+7019
Update events from v1.33 to v1.35. Update TMA metrics from v4.7 to v4.8. Bring in the event updates v1.35: https://github.com/intel/perfmon/commit/c99b60c147b96f40f96dd961abfae54909f47e5f The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Add counter information. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ Adds the event SW_PREFETCH_ACCESS.ANY. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add/update skylake events/metricsIan Rogers14-91/+756
Update events from v58 to v59. Update TMA metrics from v4.7 to v4.8. Bring in the event updates v59: https://github.com/intel/perfmon/commit/5d36f1835b02f056031a06e777e4bf54a5964930 The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Add counter information. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ Adds the event SW_PREFETCH_ACCESS.ANY. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add silvermont counter informationIan Rogers8-0/+137
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add/update sierraforest events/metricsIan Rogers17-93/+2405
Update events from v1.02 to v1.04. Add TMA metrics v4.8. Bring in the event updates v1.04: https://github.com/intel/perfmon/commit/0a9546cdf63c8b07f5c33ebf6fe49e6ebec89f86 v1.03: https://github.com/intel/perfmon/commit/c7dd26ce67ca4477d40fb4b55b6baa0584b3e5d6 The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Add counter information. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ New events are: FP_INST_RETIRED.128B_DP, FP_INST_RETIRED.128B_SP, FP_INST_RETIRED.256B_DP, FP_INST_RETIRED.32B_SP, FP_INST_RETIRED.64B_DP, OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM, OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD, OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM, OCR.STREAMING_WR.ANY_RESPONSE, UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_LOCAL, UNC_CHA_TOR_INSERTS.IO_ITOMCACHENEAR_REMOTE, UNC_CHA_TOR_INSERTS.IO_ITOM_LOCAL, UNC_CHA_TOR_INSERTS.IO_ITOM_REMOTE, UNC_CHA_TOR_INSERTS.IO_MISS, UNC_CHA_TOR_INSERTS.IO_MISS_ITOM, UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR, UNC_CHA_TOR_INSERTS.IO_PCIRDCUR_LOCAL, UNC_CHA_TOR_INSERTS.IO_PCIRDCUR_REMOTE, UNC_CXLCM_RxC_PACK_BUF_INSERTS.MEM_DATA, UNC_CXLDP_TxC_AGF_INSERTS.M2S_DATA. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add/update sapphirerapids events/metricsIan Rogers17-248/+5001
Update events from v1.20 to v1.23. Update TMA metrics from v4.7 to v4.8. Bring in the event updates v1.23: https://github.com/intel/perfmon/commit/6ace93281c0f573b90d3f8f624486ad59dde1c93 v1.22: https://github.com/intel/perfmon/commit/356eba05c07c4d54ed5b92c1164ce00fab545636 The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Add counter information. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ New events are: EXE_ACTIVITY.2_3_PORTS_UTIL, ICACHE_DATA.STALL_PERIODS, L2_TRANS.L2_WB, MEM_TRANS_RETIRED.LOAD_LATENCY_GT_1024, OFFCORE_REQUESTS.DEMAND_CODE_RD, OFFCORE_REQUESTS.DEMAND_RFO, OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD, OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD, RS.EMPTY_RESOURCE, SW_PREFETCH_ACCESS.ANY, UOPS_ISSUED.CYCLES. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update sandybridge metrics add event counter informationIan Rogers12-12/+481
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. The TMA 4.8 information was updated in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add/update rocketlake events/metricsIan Rogers13-88/+629
Update events from v1.02 to v1.03. Update TMA metrics from v4.7 to v4.8. Bring in the event updates v1.03: https://github.com/intel/perfmon/commit/a7c75ffd56c7056494cd3acc2749336cd6363b90 The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Add counter information. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ Adds the event SW_PREFETCH_ACCESS.ANY. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add nehalemex counter informationIan Rogers8-0/+560
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add nehalemep counter informationIan Rogers8-0/+565
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update meteorlake events and add counter informationIan Rogers12-184/+641
Update events from v1.08 to v1.10. Bring in the event updates v1.10: https://github.com/intel/perfmon/commit/3bee3dc150164df0bec5980ca5586930730e5778 v1.09: https://github.com/intel/perfmon/commit/01c8c99f17a72460b2eaf7efe3495913f36c9d42 Add counter information. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ New events are: EXE_ACTIVITY.2_3_PORTS_UTIL, FP_INST_RETIRED.128B_DP, FP_INST_RETIRED.128B_SP, FP_INST_RETIRED.256B_DP, FP_INST_RETIRED.32B_SP, FP_INST_RETIRED.64B_DP, FP_VINT_UOPS_EXECUTED.STD, L2_LINES_OUT.USELESS_HWPF, L2_RQSTS.SWPF_HIT, L2_RQSTS.SWPF_MISS, LOAD_HIT_PREFETCH.SWPF, MACHINE_CLEARS.ANY, MACHINE_CLEARS.MRN_NUKE, MISC_RETIRED.LBR_INSERTS, SW_PREFETCH_ACCESS.ANY. The metrics aren't updated as they require retirement latency support that is added in this series: https://lore.kernel.org/lkml/[email protected]/ Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add lunarlake counter informationIan Rogers6-0/+86
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add knightslanding counter informationIan Rogers10-0/+872
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update jaketown metrics add event counter informationIan Rogers15-12/+967
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. The TMA 4.8 information was updated in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update ivytown metrics add event counter informationIan Rogers15-31/+1523
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. The TMA 4.8 information was updated in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update ivybridge metrics add event counter informationIan Rogers12-31/+417
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. The TMA 4.8 information was updated in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add/update icelakex events/metricsIan Rogers16-222/+8269
Update events from v1.24 to v1.26. Add TMA metrics v4.8. Bring in the event updates v1.26: https://github.com/intel/perfmon/commit/c607c739e05f2569f95998cc98e1283f042b4fd1 v1.25: https://github.com/intel/perfmon/commit/42d996769069921ec06f6fbb600b0c663b9ec5a9 The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Adds the event SW_PREFETCH_ACCESS.ANY. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add/update icelake events/metricsIan Rogers13-88/+635
Update events from v1.21 to v1.22. Add TMA metrics v4.8. Bring in the event updates v1.22: https://github.com/intel/perfmon/commit/e5640646e96d59e3c1c1e0d0100a475220ff1dfe The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Adds the event SW_PREFETCH_ACCESS.ANY. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update haswellx metrics add event counter informationIan Rogers15-75/+1785
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. The TMA 4.8 information was updated in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add haswell counter informationIan Rogers13-30/+485
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update graniterapids events and add counter informationIan Rogers15-48/+10975
Update events from v1.01 to v1.02. Bring in the event updates v1.02: https://github.com/intel/perfmon/commit/0ff9f681bd07d0e84026c52f4941d21b1cd4c171 Add counter information. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ There are over 1000 new events. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update/add grandridge events/metricsIan Rogers16-66/+1693
Update events from v1.02 to v1.03. Add TMA metrics v4.8. Bring in the event updates v1.03: https://github.com/intel/perfmon/commit/5ec7a252d0f6ec461f80cc397c9ac25abcd9184f The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 New events are: FP_INST_RETIRED.128B_DP, FP_INST_RETIRED.128B_SP, FP_INST_RETIRED.256B_DP, FP_INST_RETIRED.32B_SP, FP_INST_RETIRED.64B_DP, OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM, OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD, OCR.DEMAND_RFO.L3_HIT.SNOOP_HITM, OCR.STREAMING_WR.ANY_RESPONSE. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add goldmontplus counter informationIan Rogers8-0/+187
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add goldmont counter informationIan Rogers8-0/+176
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add/update emeraldrapids events/metricsIan Rogers17-2/+7247
Update events from v1.06 to v1.09. Add TMA metrics v4.8. Bring in the event updates v1.09: https://github.com/intel/perfmon/commit/3fd5892bb4aece9c1e5c17630570d0462838e85d v1.08: https://github.com/intel/perfmon/commit/54525c4508f4a1ce4a8b854aa808a4ee2fb5930b The TMA 4.8 information was added in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 New events are: EXE_ACTIVITY.2_3_PORTS_UTIL, ICACHE_DATA.STALL_PERIODS, L2_TRANS.L2_WB, MEM_TRANS_RETIRED.LOAD_LATENCY_GT_1024, OFFCORE_REQUESTS.DEMAND_CODE_RD, OFFCORE_REQUESTS.DEMAND_RFO, OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_CODE_RD, OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD, RS.EMPTY_RESOURCE, SW_PREFETCH_ACCESS.ANY, UNC_IIO_BANDWIDTH_OUT.PART[0-7]_FREERUN, UOPS_ISSUED.CYCLES. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update elkhartlake eventsIan Rogers9-1/+313
Update events from v1.04 to v1.05. Bring in event updates from: https://github.com/intel/perfmon/commit/fb91e1851ca40a5b443e2c3cd79bc7fc34c8237e The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update cascadelakex events/metricsIan Rogers16-189/+9108
Update events from v1.21 to v1.22. Bring in the event updates v1.22 https://github.com/intel/perfmon/commit/013877729c4ed96427932ca48722bc3bfd2a0075 The TMA 4.8 information was updated in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 New events are: SW_PREFETCH_ACCESS.ANY Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update broadwellx metrics add event counter informationIan Rogers15-82/+1787
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. The TMA 4.8 information was updated in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update broadwellde metrics add event counter informationIan Rogers15-37/+1333
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. The TMA 4.8 information was updated in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update broadwell metrics add event counter informationIan Rogers13-47/+851
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. The TMA 4.8 information was updated in: https://github.com/intel/perfmon/commit/59194d4d90ca50a3fcb2de0d82b9f6fc0c9a5736 Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Add bonnell counter informationIan Rogers8-0/+277
Add counter information necessary for optimizing event grouping the perf tool. The most recent RFC patch set using this information: https://lore.kernel.org/lkml/[email protected]/ The information was added in: https://github.com/intel/perfmon/commit/475892a9690cb048949e593fe39cee65cd4765e1 and later patches. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2024-06-20perf vendor events: Update alderlaken events/metricsIan Rogers13-388/+503
Update events from v1.24 to v1.27. Update e-core TMA metrics to v3.6. Bring in the event updates v1.27: https://github.com/intel/perfmon/commit/ea4f309a04c50ca77a00da2db130fd7cf06db978 v1.26: https://github.com/intel/perfmon/commit/0052e68d24d9873d5ff22363677794fa3eb05313 The e-core TMA 3.6 information was updated in: https://github.com/intel/perfmon/commit/d9c2faa70bafe03129dc10f9fe414ef03a95acd9 New events are: MEM_UOPS_RETIRED.LOCK_LOADS, SERIALIZATION.C01_MS_SCB, UOPS_ISSUED.ANY. Co-authored-by: Weilin Wang <[email protected]> Co-authored-by: Caleb Biggers <[email protected]> Signed-off-by: Ian Rogers <[email protected]> Reviewed-by: Kan Liang <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Signed-off-by: Namhyung Kim <[email protected]> Link: https://lore.kernel.org/r/[email protected]