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2022-10-21ASoC: SOF: Intel: hda-loader-skl: Use the basefw firmware container directlyPeter Ujfalusi1-4/+3
Switch to access to the firmware struct via sdev->basefw container to unblock the removal of the firmware information from plat_data. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Chao Song <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-10-21ASoC: SOF: Intel: hda-loader: Use the basefw firmware container directlyPeter Ujfalusi1-6/+5
Switch to access to the firmware struct via sdev->basefw container to unblock the removal of the firmware information from plat_data. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Chao Song <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-10-21ASoC: Merge HDA/ext cleanupMark Brown4-31/+32
Merge branch 'topic/hda-ext-cleanup' of https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound into asoc-6.2 for further AVS work.
2022-10-20ALSA/ASoC: hda: move SPIB/DRMS functionality from ext layerPierre-Louis Bossart2-9/+10
The SPIB and DRMS capabilities are orthogonal to the DSP enablement and can be used whether the stream is coupled or not. The existing code partitioning makes limited sense, the capabilities are parsed at the sound/hda level but helpers are located in sound/hda/ext. This patch moves all the SPIB/DRMS functionality to the sound/hda layer. This reduces the complexity of the sound/hda/ext layer which is now limited to handling the multi-link extensions and stream coupling/decoupling helpers. Note that this is an iso-functionality code move and rename, the HDaudio legacy driver would need additional changes to make use of these capabilities. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2022-10-20ALSA/ASoC: hda: ext: add 'bus' prefix for multi-link stream settingPierre-Louis Bossart1-3/+3
All the helpers dealing with multi-link configurations are located in the hdac_ext_controller.c, except the two set/clear routines that modify the LOSIDV registers. For consistency, move the two helpers and add the 'bus' prefix. One could argue that the 'ml' prefix might be more relevant but that would be a larger code change. No functionality change, just move and rename. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2022-10-20ALSA/ASoC: hda: ext: remove 'link' prefix for stream-related operationsPierre-Louis Bossart1-8/+8
We should only use 'link' in the context of multi-link configurations. Streams are configured from a different register space and are not dependent on link except for LOSIDV settings. Not functionality change, just pure rename. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2022-10-20ALSA/ASoC: hda: ext: add 'ext' prefix to snd_hdac_link_free_allPierre-Louis Bossart1-1/+1
No functionality change, just prefix addition to clearly identify that the helper only applies to the 'ext' part for Intel platforms. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2022-10-20ALSA/ASoC: hda: clarify bus_get_link() and bus_link_get() helpersPierre-Louis Bossart1-2/+2
We have two helpers with confusing names and different purposes. Rename bus_get_link() and bus_get_link_at() as bus_get_hlink_by_name() and bus_get_hlink_by_addr() respectively. No functionality change Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2022-10-20ASoC: SOF: Intel: hda-dai: use hlink variable/parameterPierre-Louis Bossart1-12/+12
Follow the convention and use hlink for consistency. No functionality change. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2022-10-19ASoC: SOF: Intel: pci-tgl: fix ADL-N descriptorPierre-Louis Bossart1-1/+29
ADL-N uses a different signing key, which means we can't reuse the regular ADL descriptor used for ADL-P/M/S. Fixes: cd57eb3c403cb ("ASoC: SOF: Intel: pci-tgl: add ADL-N support") Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Chao Song <[email protected]> Reviewed-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-10-19ASoC: jz4752b: Capture fixesMark Brown1-15/+40
Merge series from Siarhei Volkau <[email protected]>: The patchset fixes: - Line In path stays powered off during capturing or bypass to mixer. - incorrectly represented dB values in alsamixer, et al. - incorrect represented Capture input selector in alsamixer in Playback tab. - wrong control selected as Capture Master
2022-10-19ASoC: SOF: Intel: Harden the IPC4 low level sequencingMark Brown5-11/+86
Merge series from Peter Ujfalusi <[email protected]>: Hi, The IPC4 use of doorbell registers leaves some corner cases not well defined and the 'correct sequences' are subjective in a sense. The DSP doorbell registers are used as separate and independent channels and the sequences for host -> DSP -> host (reply) can be racy. For example: The ACKing of a received message can happen before the firmware sends the reply or it can as well happen after the reply has been sent and received by the host. Both can be considered 'correct sequences' but they need different handling. This series will allow the kernel to service any interpretation of the sequencing on the firmware side.
2022-10-18ASoC: SOF: Intel: ipc4: Ack a received reply or notification separatelyPeter Ujfalusi3-8/+11
By acking a received message we tell the DSP that we have processed the message (reply or notification) and we are open to receive a new one. The original implementation did this in a common code after the received message got handled as reply or notification. With right timing this opens up a small window when we have processed the reply and let the other thread proceed to send a new message to the DSP, which is allowed as the DSP is free to receive message. But when the message is received and processed by the DSP and it wants to send a reply it will still see that the previous message has not been acked, so it fails to send a reply. Later the first reply got acked by the kernel, but it is too late and the in-flight message got a timeout due to firmware not responding (which it tried, but could not). Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Rander Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-10-18ASoC: SOF: Intel: ipc4: Wait for channel to be free before sending a messagePeter Ujfalusi5-0/+71
Before attempting to send a message to the DSP we need to check if the downstream BUSY flag has been cleared by the firmware to avoid lost IPC messages by the firmware. This is required by a firmware which only acks the received message after it has sent a reply to the host. With a bad luck, the host would send a message before the firmware gets to the clearing the flag and thus losing a message. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Rander Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-10-18ASoC: SOF: Intel: ipc4: Read the interrupt reason registers at the same timePeter Ujfalusi3-3/+4
Read both registers as the first step in the interrupt handler to make sure that we are handling the event which triggered the interrupt. The delayed reading of the target request register might reflect incorrect information about the reason why the interrupt was risen. Note also that the IPC3 interrupt handler is implemented in this way also. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Rander Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-10-18ASoC: SOF: Intel: hda-dsp: simplify S3 resume flowsPierre-Louis Bossart1-14/+0
The flow contains surprising parts that seem to have been inspired by the Skylake driver. During a resume from S3, the state of the links prior to suspend should not matter. One would have to assume that the links are powered down anyways prior to suspend, and there is also no specific code that turns links on unconditionally on resume. Likewise, the snd_hdac_init_chip() routine will start the cmd_io handling, and it's not clear why we should care about the state of the DMA prior to suspend. This patch removes these two sequences to simplify the flow. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Cezary Rojewski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-10-18ASoC: SOF: Intel: pci-mtl: fix firmware namePierre-Louis Bossart1-1/+1
Initial IPC4 tests used the same conventions as previous reference closed-source firmware, but for MeteorLake the convention is the same as previous SOF releases (sof-<platform>.ri). Only the prefix changes to avoid confusions between IPC types. This change has no impact on users since the firmware has not yet been released. Fixes: 064520e8aeaa2 ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)") Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Chao Song <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-10-03Merge tag 'asoc-v6.1' of ↵Takashi Iwai20-240/+1183
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Updates for v6.1 This has been a very quiet release for the core but quite a busy one for drivers with a big crop of new drivers and lots of feature additions and fixes to existing ones: - A new string helper parse_int_array_user(). - Improvements to the SOF IPC4 code, especially around trace. - Support for AMD Rembrant DSPs, AMD Pink Sardine ACP 6.2, Apple Silcon systems, Everest ES8326, Intel Sky Lake and Kaby Lake, MediaTek MT8186 support, NXP i.MX8ULP DSPs, Qualcomm SC8280XP, SM8250 and SM8450 and Texas Instruments SRC4392 There is a conflict with the conversion of I2C remove functions to void in the cs42l42 driver which is fairly straightforward to resolve but should be highlighted to Linus.
2022-09-23ASoC: SOF: ipc4/Intel: Improve and enable IPC error dumpMark Brown9-15/+76
Merge series from Peter Ujfalusi <[email protected]>: On Intel platforms the registers for DSP communications are used differently, the IPC dump information is not correct since important registers are not printed and existing ones are used a bit differently for IPC4. As a last step, enable the IPC timeout 'handling' and allow the printout of the now usefull IPC dump.
2022-09-23ASoC: SOF: Intel: hda: Only dump firmware registers for IPC3Peter Ujfalusi1-1/+2
The firmware register dump is IPC3 specific, it is not available for other IPC versions. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Rander Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: mtl: Print relevant register in ipc_dumpPeter Ujfalusi1-9/+8
The use of the IPC registers are different between IPC3 and IPC4. The ipc_dump needs to use different prints depending on the used IPC protocol. The existing code was printing registers relevant for IPC3, which is not even supported on MTL. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Rander Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: skl: Use the ipc4 version of the ipc_dumpPeter Ujfalusi1-1/+1
The use of the IPC registers are different between IPC3 and IPC4. The ipc_dump needs to use different prints depending on the used IPC protocol. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Rander Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: hda: Add separate ops for ipc_dump for IPC4Peter Ujfalusi3-1/+25
The use of the IPC registers are different between IPC3 and IPC4. The ipc_dump needs to use different prints depending on the used IPC protocol. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Rander Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: cnl: Add separate ops for ipc_dump for IPC4Peter Ujfalusi4-3/+40
The use of the IPC registers are different between IPC3 and IPC4. The ipc_dump needs to use different prints depending on the used IPC protocol. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Rander Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: MTL: remove the unnecessary snd_sof_dsp_read()Yong Zhi1-8/+0
The return val of snd_sof_dsp_read() right before polling the same register is not used, so remove the redundant call. Signed-off-by: Yong Zhi <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: MTL: reuse the common ops for PMRanjani Sridharan1-150/+0
Now that the disabling of interrupts and powering down the DSP has been abstracted, re-use the common ops for PM for MTL as well. Signed-off-by: Ranjani Sridharan <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: HDA: use IPC version-specific opsRanjani Sridharan1-8/+5
Use the IP-specific ops for disabling interrupts and powering down the DSP in hda_suspend. Signed-off-by: Ranjani Sridharan <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: MTL: define and set the disable_interrupts opRanjani Sridharan1-0/+7
Disable the IPC and SDW interrupts in the disable_interrupts op. Signed-off-by: Ranjani Sridharan <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: define and set the disable_interrupts op for cavs platformsRanjani Sridharan7-0/+18
Disable the IPC and SDW nterrupts in the disable_interrupts op for cavs platforms. Signed-off-by: Ranjani Sridharan <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: Add a new op for disabling interruptsRanjani Sridharan1-0/+1
The sequence for disabling DSP interrupts varies between different IP versions. Signed-off-by: Ranjani Sridharan <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: use power_down_dsp op in hda_dsp_removeFred Oh1-3/+3
Use power_down_dsp op to differentiate power down sequences in platforms. Signed-off-by: Fred Oh <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Bard Liao <[email protected]> Signed-off-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: mtl: define and set power_down_dsp opFred Oh1-0/+28
For MTL platform, dsp cores need to go power down first then dsp subsystem also need to set power down. Signed-off-by: Fred Oh <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Bard Liao <[email protected]> Signed-off-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: define and set power_down_dsp op for HDA platformsFred Oh7-0/+18
hda_power_down_dsp is set for power_down_dsp op for all HDA platforms. Signed-off-by: Fred Oh <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Bard Liao <[email protected]> Signed-off-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-23ASoC: SOF: Intel: introduce new op to handle dsp power downFred Oh1-0/+1
DSP core power down sequences are different between cavs platforms and MTL. Signed-off-by: Fred Oh <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Bard Liao <[email protected]> Signed-off-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-22ASoC: SOF: pci-tgl: add missing PCI IDs for RPLPierre-Louis Bossart1-0/+4
Add IDs for RPL-M and RPL-PX Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-22ASoC: SOF: Intel: pci-tgl: reorder PCI IDsPierre-Louis Bossart1-2/+2
No functionality change, just sort ADL PCI IDs by increasing order. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-20ASoC: SOF: Intel: add ops for SKL/KBLPierre-Louis Bossart2-9/+57
Add ops and ops_init for SKL and KBL. Tested on Dell XPS-13-9350 and KBL NUC. Note: currently only SOF_IPC4_MTRACE_INTEL_CAVS_2 type is supported by the ipc4-mtrace driver, which is used by CAVS 2.x platforms (ICL, TGL, ADL) and ACE (MTL). Signed-off-by: Ranjani Sridharan <[email protected]> Signed-off-by: Péter Ujfalusi <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-20ASoC: SOF: Intel: add initial SKL/KBL hardware supportPierre-Louis Bossart8-5/+204
In preparation of the IPCv4 IPC support, this patch adds support for SkyLake and KabyLake boot and descriptors used when probing the PCI driver. The work was initially contributed in 2018 by Liam Girdwood and Zhu Yingjiang, and abandoned due to firmware signature issues. With the upcoming support of IPC v4, and hence the Intel closed-source firmware, it's time to re-add this capability. The SKL ops will be added in the next patch. Tested with the IPC4 and closed-source firmware on Dell XPS 9350 and KBL NUC with HDaudio codecs. The SSP and DMIC interfaces are not supported at this time. Co-developed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Ranjani Sridharan <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-20ASoC: SOF: Intel: add SKL/KBL hardware code loaderPierre-Louis Bossart2-0/+589
This patch adds support for the SkyLake and KabyLake code loader on top of the SOF IPC4. The work was initially contributed in 2018 by Liam Girdwood and Zhu Yingjiang, and abandoned due to firmware signature issues. With the existing support of IPC v4, it's time to re-add this capability. This patch uses the newly added FSR (Firmware State Register) definitions for DSP state handling and targeting, ass well as new state definition for SKL which indicates that the firmware has been started (similar to FW_ENTERED on other platforms). Co-developed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Ranjani Sridharan <[email protected]> Co-developed-by: Peter Ujfalusi <[email protected]> Signed-off-by: Peter Ujfalusi <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-20ASoC: SOF: Intel: hda-dsp: expose functions for SKL supportPierre-Louis Bossart2-2/+5
In preparation of the IPCv4 IPC support, this patch adds exposes two functions required by the SKL/KBL boot and code loader. Co-developed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Ranjani Sridharan <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-20ASoC: SOF: Intel: override mclk_id for ES8336 supportMark Brown4-5/+46
Merge series from Pierre-Louis Bossart <[email protected]>: This patchset solves a known issue with ES8336 platforms wrt MCLK selection. Most of the devices use the MCLK0 signal, but some devices do use the MCLK1 signal. The MCLK is defined in the topology, it would be a nightmare to generate more topology files just for one MCLK difference. With a minor extension to the intel-nhlt library, the MCLK information can be found by parsing the NHLT table, and we can override the mclk_id at boot time. The only known issues for this platform remain the detection of GPIO and microphone connections, currently only possible with manual quirks. Thanks to Eugene J. Markow for testing this patchset.
2022-09-20ASoC: SOF: Intel: hda: override mclk_id after parsing NHLT SSP blobPierre-Louis Bossart1-0/+28
The NHLT is already used to determine which SSP is connected to an audio codec, we can parse the SSP blob to get the mclk_id from NHLT. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-19ASoC: SOF: add quirk to override topology mclk_idPierre-Louis Bossart1-0/+11
Some Intel-based platforms rely on a topology file that hard-codes the use of MCLK0. This is incorrect in 10% of the cases. Rather than generating yet another set of topology files, this patch adds a kernel module parameter to override the topology value. In hindsight, we should never have allowed mclks to be specified in topology, this is a hardware-level information that should not have been visible in the topology. Future patches will try to set this value automagically, e.g. by parsing the NHLT content. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Kai Vehmanen <[email protected]> Reviewed-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-19ASoC: SOF: Intel: hda: refine SSP count supportPierre-Louis Bossart3-5/+7
The SSP count is incorrect for TGL and MTL devices, the SSP count is limited to 3 (I2SPC parameter in the Integration HAS). Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-19ASoC: SOF: Intel: replace dev_vdbg with tracepointsBard Liao6-21/+16
This patch replaces all dev_vdbg calls with tracepoints to reduce overhead and enable use of trace collection and analysis tools. Reviewed-by: Péter Ujfalusi <[email protected]> Signed-off-by: Noah Klayman <[email protected]> Signed-off-by: Bard Liao <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-19ASoC: SOF: Intel: remove unneeded dev_vdbgNoah Klayman1-3/+0
This patch removes an unneeded dev_vdbg call in hda-stream. Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Signed-off-by: Noah Klayman <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-19ASoC: SOF: Intel: add HDA interrupt source tracingNoah Klayman1-4/+15
The Intel HDaudio controller relies on a single interrupt line which wire-ORs multiple interrupt sources, such as stream, IPC, SoundWire and wakes. This patch adds the ability to trace each event occurrence. Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Signed-off-by: Noah Klayman <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-09ASoC: SOF: Intel: Add mtrace type information for IPC4Peter Ujfalusi5-0/+10
Set the mtrace type for platforms supported by IPC4. Note: currently only SOF_IPC4_MTRACE_INTEL_CAVS_2 type is supported by the ipc4-mtrace driver, which is used by CAVS 2.x platforms (ICL, TGL, ADL) and ACE (MTL). Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-09ASoC: SOF: Intel: icl: Set IPC4-specific DSP opsPeter Ujfalusi1-4/+24
Add implementation of low level, platform dependent IPC4 message handling and set the DSP ops for IPC4 for ICL platform. Suggested-by: Rander Wang <[email protected]> Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-08-23ASoC: SOF: Intel: hda: Skip IMR boot after a firmware crash or boot failurePeter Ujfalusi1-1/+6
To make sure that we start from a clean state next time when the DSP is powered up after a firmware crash or boot failure we must skip the IMR booting attempt. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>