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2015-07-27genirq: Add chip_[suspend|resume] PM support to irq_chipBrian Norris1-0/+6
Some (admittedly odd) irqchips perform functions that are not directly related to any of their child IRQ lines, and therefore need to perform some tasks during suspend/resume regardless of whether there are any "installed" interrupts for the irqchip. However, the current generic-chip framework does not call the chip's irq_{suspend,resume} when there are no interrupts installed (this makes sense, because there are no irq_data objects for such a call to be made). More specifically, irq-bcm7120-l2 configures both a forwarding mask (which affects other top-level GIC IRQs) and a second-level interrupt mask (for managing its own child interrupts). The former must be saved/restored on suspend/resume, even when there's nothing to do for the latter. This patch adds a new set of suspend/resume hooks to irq_chip_generic, to help represent *chip* suspend/resume, rather than IRQ suspend/resume. These callbacks will always be called for an IRQ chip (regardless of the installed interrupts) and are based on the per-chip irq_chip_generic struct, rather than the per-IRQ irq_data struct. The original problem report is described in extra detail here: http://lkml.kernel.org/g/20150619224123.GL4917@ld-irv-0074 Signed-off-by: Brian Norris <[email protected]> Tested-by: Florian Fainelli <[email protected]> Cc: Gregory Fong <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Kevin Cernekee <[email protected]> Cc: Jason Cooper <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2015-05-18genirq: generic chip: Support hierarchy domainStefan Agner1-3/+2
Use the new helper function irq_domain_set_info to make sure the function irq_domain_set_hwirq_and_chip is being called, which is crucial to save irqdomain specific data to irq_data. Signed-off-by: Stefan Agner <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2014-11-09genirq: Generic chip: Add big endian I/O accessorsKevin Cernekee1-0/+16
Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating the irqchip. Signed-off-by: Kevin Cernekee <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Acked-by: Acked-by: Arnd Bergmann <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]>
2014-11-09genirq: Generic chip: Change irq_reg_{readl,writel} argumentsKevin Cernekee1-10/+10
Pass in the irq_chip_generic struct so we can use different readl/writel settings for each irqchip driver, when appropriate. Compute (gc->reg_base + reg_offset) in the helper function because this is pretty much what all callers want to do anyway. Compile-tested using the following configurations: at91_dt_defconfig (CONFIG_ATMEL_AIC_IRQ=y) sama5_defconfig (CONFIG_ATMEL_AIC5_IRQ=y) sunxi_defconfig (CONFIG_ARCH_SUNXI=y) tb10x (ARC) is untested. Signed-off-by: Kevin Cernekee <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Acked-by: Acked-by: Arnd Bergmann <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]>
2014-07-17genirq: generic chip: Export irq_map_generic_chip functionBoris BREZILLON1-2/+3
Export the generic irq map function in order to provide irq_domain ops with generic mapping and specific of xlate function (needed by the new atmel AIC driver). Signed-off-by: Boris BREZILLON <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Link: https://lkml.kernel.org/r/1405012462-766-2-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Jason Cooper <[email protected]>
2013-07-13Merge branch 'irq-urgent-for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: - core fix for missing round up in the generic irq chip implementation - new irq chip for MOXA SoCs - a few fixes and cleanups in the irqchip drivers * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip: Add support for MOXA ART SoCs genirq: generic chip: Use DIV_ROUND_UP to calculate numchips irqchip: nvic: Fix wrong num_ct argument for irq_alloc_domain_generic_chips() irqchip: sun4i: Staticize sun4i_irq_ack() irqchip: vt8500: Staticize local symbols
2013-07-06Merge tag 'irqdomain-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds1-4/+2
Pull irqdomain refactoring from Grant Likely: "This is the long awaited simplification of irqdomain. It gets rid of the different types of irq domains and instead both linear and tree mappings can be supported in a single domain. Doing this removes a lot of special case code and makes irq domains simpler to understand overall" * tag 'irqdomain-for-linus' of git://git.secretlab.ca/git/linux: irq: fix checkpatch error irqdomain: Include hwirq number in /proc/interrupts irqdomain: make irq_linear_revmap() a fast path again irqdomain: remove irq_domain_generate_simple() irqdomain: Refactor irq_domain_associate_many() irqdomain: Beef up debugfs output irqdomain: Clean up aftermath of irq_domain refactoring irqdomain: Eliminate revmap type irqdomain: merge linear and tree reverse mappings. irqdomain: Add a name field irqdomain: Replace LEGACY mapping with LINEAR irqdomain: Relax failure path on setting up mappings
2013-07-05genirq: generic chip: Use DIV_ROUND_UP to calculate numchipsAxel Lin1-1/+1
The number of interrupts in a domain may be not divisible by the number of interrupts each chip handles. Integer division may truncate the result, thus use DIV_ROUND_UP to count numchips. Seems all users of irq_alloc_domain_generic_chips() in current code do not have this issue. I just found the issue while reading the code. Signed-off-by: Axel Lin <[email protected]> Cc: Grant Likely <[email protected]> Cc: Tony Lindgren <[email protected]> Cc: Arnd Bergmann <[email protected]> Link: http://lkml.kernel.org/r/1373015592.18252.2.camel@phoenix Signed-off-by: Thomas Gleixner <[email protected]>
2013-07-04Merge branch 'for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial tree updates from Jiri Kosina: "The usual stuff from trivial tree" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (34 commits) treewide: relase -> release Documentation/cgroups/memory.txt: fix stat file documentation sysctl/net.txt: delete reference to obsolete 2.4.x kernel spinlock_api_smp.h: fix preprocessor comments treewide: Fix typo in printk doc: device tree: clarify stuff in usage-model.txt. open firmware: "/aliasas" -> "/aliases" md: bcache: Fixed a typo with the word 'arithmetic' irq/generic-chip: fix a few kernel-doc entries frv: Convert use of typedef ctl_table to struct ctl_table sgi: xpc: Convert use of typedef ctl_table to struct ctl_table doc: clk: Fix incorrect wording Documentation/arm/IXP4xx fix a typo Documentation/networking/ieee802154 fix a typo Documentation/DocBook/media/v4l fix a typo Documentation/video4linux/si476x.txt fix a typo Documentation/virtual/kvm/api.txt fix a typo Documentation/early-userspace/README fix a typo Documentation/video4linux/soc-camera.txt fix a typo lguest: fix CONFIG_PAE -> CONFIG_x86_PAE in comment ...
2013-06-28genirq: Add the generic chip to the genirq docbookThomas Gleixner1-5/+6
Signed-off-by: Thomas Gleixner <[email protected]> Cc: Randy Dunlap <[email protected]>
2013-06-28genirq: generic-chip: Export some irq_gc_ functionsFabio Estevam1-0/+3
When building imx_v6_v7_defconfig with imx-drm drivers selected as modules, we get the following build errors: ERROR: "irq_gc_mask_clr_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined! ERROR: "irq_gc_mask_set_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined! ERROR: "irq_gc_ack_set_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined! Export the required functions to avoid this problem. Signed-off-by: Fabio Estevam <[email protected]> Cc: [email protected] Cc: [email protected] Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-06-24genirq: Irqchip: document gcflags arg of irq_alloc_domain_generic_chipsJames Hogan1-0/+1
Commit 088f40b7b027dad6519712ff224a5798dd62a204 ("genirq: Generic chip: Add linear irq domain support") missed kerneldoc for the gcflags argument of irq_alloc_domain_generic_chips(). Add it now. Signed-off-by: James Hogan <[email protected]> Acked-by: Grant Likely <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-06-18irq/generic-chip: fix a few kernel-doc entriesUwe Kleine-König1-3/+3
Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
2013-06-10irqdomain: Eliminate revmap typeGrant Likely1-4/+1
The NOMAP irq_domain type is only used by a handful of interrupt controllers and it unnecessarily complicates the code by adding special cases on how to look up mappings and different revmap functions are used for each type which need to validate the correct type is passed to it before performing the reverse map. Eliminating the revmap_type and making a single reverse mapping function simplifies the code. It also shouldn't be any slower than having separate revmap functions because the type of the revmap needed to be checked anyway. The linear and tree revmap types were already merged in a previous patch. This patch rolls the NOMAP or direct mapping behaviour into the same domain code making is possible for an irq domain to do any mapping type; linear, tree or direct; and that the mapping will be transparent to the interrupt controller driver. With this change, direct mappings will get stored in the linear or tree mapping for consistency. Reverse mapping from the hwirq to virq will go through the normal lookup process. However, any controller using a direct mapping can take advantage of knowing that hwirq==virq for any mapped interrupts skip doing a revmap lookup when handling IRQs. Signed-off-by: Grant Likely <[email protected]>
2013-06-10irqdomain: Add a name fieldGrant Likely1-0/+1
This patch adds a name field to the irq_domain structure to help mere mortals understand the mappings between irq domains and virqs. It also converts a number of places that have open-coded some kind of fudging an irqdomain name to use the new field. This means a more consistent display of names in irq domain log messages and debugfs output. Signed-off-by: Grant Likely <[email protected]>
2013-05-29genirq: irqchip: Add mask to block out invalid irqsGrant Likely1-0/+3
Some controllers have irqs that aren't wired up and must never be used. For the generic chip attached to an irq_domain this provides a mask that can be used to block out particular irqs so that they never get mapped. Signed-off-by: Grant Likely <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-05-29genirq: Generic chip: Add linear irq domain supportThomas Gleixner1-6/+181
Provide infrastructure for irq chip implementations which work on linear irq domains. - Interface to allocate multiple generic chips which are associated to the irq domain. - Interface to get the generic chip pointer for a particular hardware interrupt in the domain. - irq domain mapping function to install the chip for a particular interrupt. Note: This lacks a removal function for now. [ Sebastian Hesselbarth: Mask cache and pointer math fixups ] Signed-off-by: Thomas Gleixner <[email protected]> Cc: Thomas Petazzoni <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Russell King - ARM Linux <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Jean-Francois Moine <[email protected]> Cc: [email protected] Cc: Rob Herring <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Gerlando Falauto <[email protected]> Cc: Rob Landley <[email protected]> Acked-by: Grant Likely <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Ezequiel Garcia <[email protected]> Cc: [email protected] Cc: Sebastian Hesselbarth <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-05-29genirq: Generic chip: Split out code into separate functionsThomas Gleixner1-16/+34
Preparatory patch for linear interrupt domains. Signed-off-by: Thomas Gleixner <[email protected]> Cc: Thomas Petazzoni <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Russell King - ARM Linux <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Jean-Francois Moine <[email protected]> Cc: [email protected] Cc: Rob Herring <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Gerlando Falauto <[email protected]> Cc: Rob Landley <[email protected]> Acked-by: Grant Likely <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Ezequiel Garcia <[email protected]> Cc: [email protected] Cc: Sebastian Hesselbarth <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-05-29genirq: irqchip: Add a mask calculation functionThomas Gleixner1-2/+6
Some chips have weird bit mask access patterns instead of the linear you expect. Allow them to calculate the cached mask themself. Signed-off-by: Thomas Gleixner <[email protected]> Cc: Thomas Petazzoni <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Russell King - ARM Linux <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Jean-Francois Moine <[email protected]> Cc: [email protected] Cc: Rob Herring <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Gerlando Falauto <[email protected]> Cc: Rob Landley <[email protected]> Acked-by: Grant Likely <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Ezequiel Garcia <[email protected]> Cc: [email protected] Cc: Sebastian Hesselbarth <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-05-29genirq: Generic chip: Cache per irq bit maskThomas Gleixner1-9/+14
Cache the per irq bit mask instead of recalculating it over and over. Signed-off-by: Thomas Gleixner <[email protected]> Cc: Thomas Petazzoni <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Russell King - ARM Linux <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Jean-Francois Moine <[email protected]> Cc: [email protected] Cc: Rob Herring <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Gerlando Falauto <[email protected]> Cc: Rob Landley <[email protected]> Acked-by: Grant Likely <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Ezequiel Garcia <[email protected]> Cc: [email protected] Cc: Sebastian Hesselbarth <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-05-29genirq: Generic chip: Handle separate mask registersGerlando Falauto1-7/+10
There are cases where all irq_chip_type instances have separate mask registers, making a shared mask register cache unsuitable for the purpose. Introduce a new flag IRQ_GC_MASK_CACHE_PER_TYPE. If set, point the per chip mask pointer to the per chip private mask cache instead. [ tglx: Simplified code, renamed flag and massaged changelog ] Signed-off-by: Gerlando Falauto <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Joey Oravec <[email protected]> Cc: Lennert Buytenhek <[email protected]> Cc: Russell King - ARM Linux <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Holger Brunck <[email protected]> Cc: Ezequiel Garcia <[email protected]> Acked-by: Grant Likely <[email protected]> Cc: Sebastian Hesselbarth <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: [email protected] Cc: Rob Herring <[email protected]> Cc: Ben Dooks <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Simon Guinot <[email protected]> Cc: [email protected] Cc: Thomas Petazzoni <[email protected]> Cc: Jean-Francois Moine <[email protected]> Cc: Nicolas Pitre <[email protected]> Cc: Rob Landley <[email protected]> Cc: Maxime Ripard <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-05-29genirq: Generic chip: Add support for per chip type mask cacheGerlando Falauto1-6/+10
Today the same interrupt mask cache (stored within struct irq_chip_generic) is shared between all the irq_chip_type instances. As there are instances where each irq_chip_type uses a distinct mask register (as it is the case for Orion SoCs), sharing a single mask cache may be incorrect. So add a distinct pointer for each irq_chip_type, which for now points to the original mask register within irq_chip_generic. So no functional changes here. [ tglx: Minor cosmetic tweaks ] Reported-by: Joey Oravec <[email protected]> Signed-off-by: Simon Guinot <[email protected]> Signed-off-by: Holger Brunck <[email protected]> Signed-off-by: Gerlando Falauto <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Lennert Buytenhek <[email protected]> Cc: Russell King - ARM Linux <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Holger Brunck <[email protected]> Cc: Ezequiel Garcia <[email protected]> Acked-by: Grant Likely <[email protected]> Cc: Sebastian Hesselbarth <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: [email protected] Cc: Rob Herring <[email protected]> Cc: Ben Dooks <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Simon Guinot <[email protected]> Cc: [email protected] Cc: Thomas Petazzoni <[email protected]> Cc: Jean-Francois Moine <[email protected]> Cc: Nicolas Pitre <[email protected]> Cc: Rob Landley <[email protected]> Cc: Maxime Ripard <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2013-05-29genirq: Generic chip: Remove the local cur_regs() functionGerlando Falauto1-14/+17
Since we already have an irq_data_get_chip_type() function which returns a pointer to irq_chip_type, use that instead of cur_regs(). Signed-off-by: Gerlando Falauto <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Joey Oravec <[email protected]> Cc: Lennert Buytenhek <[email protected]> Cc: Russell King - ARM Linux <[email protected]> Cc: Jason Gunthorpe <[email protected]> Cc: Holger Brunck <[email protected]> Cc: Ezequiel Garcia <[email protected]> Acked-by: Grant Likely <[email protected]> Cc: Sebastian Hesselbarth <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: [email protected] Cc: Rob Herring <[email protected]> Cc: Ben Dooks <[email protected]> Cc: Gregory Clement <[email protected]> Cc: Simon Guinot <[email protected]> Cc: [email protected] Cc: Thomas Petazzoni <[email protected]> Cc: Jean-Francois Moine <[email protected]> Cc: Nicolas Pitre <[email protected]> Cc: Rob Landley <[email protected]> Cc: Maxime Ripard <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
2011-10-31kernel: Fix files explicitly needing EXPORT_SYMBOL infrastructurePaul Gortmaker1-0/+1
These files were getting <linux/module.h> via an implicit non-obvious path, but we want to crush those out of existence since they cost time during compiles of processing thousands of lines of headers for no reason. Give them the lightweight header that just contains the EXPORT_SYMBOL infrastructure. Signed-off-by: Paul Gortmaker <[email protected]>
2011-10-24irq: Add EXPORT_SYMBOL_GPL to function of irq generic-chipNobuhiro Iwamatsu1-0/+4
Some functions of irq generic-chip is undefined, because EXPORT_SYMBOL_GPL is not set to these. ERROR: "irq_setup_generic_chip" [drivers/gpio/gpio-pch.ko] undefined! ERROR: "irq_alloc_generic_chip" [drivers/gpio/gpio-pch.ko] undefined! ERROR: "irq_setup_generic_chip" [drivers/gpio/gpio-ml-ioh.ko] undefined! ERROR: "irq_alloc_generic_chip" [drivers/gpio/gpio-ml-ioh.ko] undefined! This is revised that EXPORT_SYMBOL_GPL can be added and referred to in functions. Signed-off-by: Nobuhiro Iwamatsu <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Signed-off-by: Grant Likely <[email protected]>
2011-07-26genirq: Fix wrong bit operation[email protected]1-2/+2
(!msk & 0x01) should be !(msk & 0x01) Signed-off-by: Jonghwan Choi <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]> Cc: [email protected]
2011-07-07genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd)Simon Guinot1-2/+16
This fixes a regression introduced by e59347a "arm: orion: Use generic irq chip". Depending on the device, interrupts acknowledgement is done by setting or by clearing a dedicated register. Replace irq_gc_ack() with some {set,clr}_bit variants allows to handle both cases. Note that this patch affects the following SoCs: Davinci, Samsung and Orion. Except for this last, the change is minor: irq_gc_ack() is just renamed into irq_gc_ack_set_bit(). For the Orion SoCs, the edge GPIO interrupts support is currently broken. irq_gc_ack() try to acknowledge a such interrupt by setting the corresponding cause register bit. The Orion GPIO device expect the opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used. Tested on Network Space v2. Reported-by: Joey Oravec <[email protected]> Signed-off-by: Simon Guinot <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2011-04-23genirq: Add chip suspend and resume callbacksThomas Gleixner1-0/+93
These callbacks are only called in the syscore suspend/resume code on interrupt chips which have been registered via the generic irq chip mechanism. Calling those callbacks per irq would be rather icky, but with the generic irq chip mechanism we can call this per registered chip. Signed-off-by: Thomas Gleixner <[email protected]> Cc: [email protected]
2011-04-23genirq: Implement a generic interrupt chipThomas Gleixner1-0/+261
Implement a generic interrupt chip, which is configurable and is able to handle the most common irq chip implementations. Signed-off-by: Thomas Gleixner <[email protected]> Cc: [email protected] Tested-by: H Hartley Sweeten <[email protected]> Tested-by: Tony Lindgren <[email protected]> Tested-by; Kevin Hilman <[email protected]>
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