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2022-05-06xfrm: rename xfrm_state_offload struct to allow reuseLeon Romanovsky1-5/+5
The struct xfrm_state_offload has all fields needed to hold information for offloaded policies too. In order to do not create new struct with same fields, let's rename existing one and reuse it later. Reviewed-by: Raed Salem <[email protected]> Signed-off-by: Leon Romanovsky <[email protected]> Acked-by: David S. Miller <[email protected]> Signed-off-by: Steffen Klassert <[email protected]>
2022-05-06xfrm: delete not used number of external headersLeon Romanovsky1-1/+0
num_exthdrs is set but never used, so delete it. Reviewed-by: Raed Salem <[email protected]> Signed-off-by: Leon Romanovsky <[email protected]> Acked-by: David S. Miller <[email protected]> Signed-off-by: Steffen Klassert <[email protected]>
2022-05-06xfrm: free not used XFRM_ESP_NO_TRAILER flagLeon Romanovsky1-1/+1
After removal of Innova IPsec support from mlx5 driver, the last user of this XFRM_ESP_NO_TRAILER was gone too. This means that we can safely remove it as no other hardware is capable (or need) to remove ESP trailer. Reviewed-by: Raed Salem <[email protected]> Signed-off-by: Leon Romanovsky <[email protected]> Acked-by: David S. Miller <[email protected]> Signed-off-by: Steffen Klassert <[email protected]>
2022-05-06Merge tag 'drm-intel-gt-next-2022-05-05' of ↵Dave Airlie1-6/+56
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - Add kerneldoc for engine class enum (Matt Roper) - Add compute engine ABI (Matt Roper) Driver Changes: - Define GuC firmware version for DG2 (John Harrison) - Clear SET_PREDICATE_RESULT prior to executing the ring (Chris Wilson) - Fix race in __i915_vma_remove_closed (Karol Herbst) - Add register for compute engine's MMIO-based TLB invalidation (Matt Roper) - Xe_HP SDV and DG2 have up to 4 CCS engines (Daniele Ceraolo Spurio) - Add initial Ponte Vecchio definitions (Stuart Summers) - Document the eviction of the Flat-CCS objects (Ramalingam C) - Use existing uncore helper to read gpm_timestamp (Umesh Nerlige Ramappa) - Fix issue with LRI relative addressing (Akeem G Abodunrin) - Skip poisoning SET_PREDICATE_RESULT on dg2 (Chris Wilson) - Optimize the ccs_sz calculation per chunk (Ramalingam C) - Remove superfluous string helper include (Jani Nikula) - Fix assert in i915_ggtt_pin (Tvrtko Ursulin) - Use IOMEM_ERR_PTR() directly (Kefeng Wang) Signed-off-by: Dave Airlie <[email protected]> From: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/YnNxCm1pyflu3taj@tursulin-mobl2
2022-05-05dt-bindings: clk: qcom: gcc-msm8976: Add modem resetAdam Skladowski1-0/+1
Add modem reset for MSM8976. Signed-off-by: Adam Skladowski <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-05-05net: mscc: ocelot: mark traps with a bool instead of keeping them in a listVladimir Oltean1-1/+1
Since the blamed commit, VCAP filters can appear on more than one list. If their action is "trap", they are chained on ocelot->traps via filter->trap_list. This is in addition to their normal placement on the VCAP block->rules list head. Therefore, when we free a VCAP filter, we must remove it from all lists it is a member of, including ocelot->traps. There are at least 2 bugs which are direct consequences of this design decision. First is the incorrect usage of list_empty(), meant to denote whether "filter" is chained into ocelot->traps via filter->trap_list. This does not do the correct thing, because list_empty() checks whether "head->next == head", but in our case, head->next == head->prev == NULL. So we dereference NULL pointers and die when we call list_del(). Second is the fact that not all places that should remove the filter from ocelot->traps do so. One example is ocelot_vcap_block_remove_filter(), which is where we have the main kfree(filter). By keeping freed filters in ocelot->traps we end up in a use-after-free in felix_update_trapping_destinations(). Attempting to fix all the buggy patterns is a whack-a-mole game which makes the driver unmaintainable. Actually this is what the previous patch version attempted to do: https://patchwork.kernel.org/project/netdevbpf/patch/[email protected]/ but it introduced another set of bugs, because there are other places in which create VCAP filters, not just ocelot_vcap_filter_create(): - ocelot_trap_add() - felix_tag_8021q_vlan_add_rx() - felix_tag_8021q_vlan_add_tx() Relying on the convention that all those code paths must call INIT_LIST_HEAD(&filter->trap_list) is not going to scale. So let's do what should have been done in the first place and keep a bool in struct ocelot_vcap_filter which denotes whether we are looking at a trapping rule or not. Iterating now happens over the main VCAP IS2 block->rules. The advantage is that we no longer risk having stale references to a freed filter, since it is only present in that list. Fixes: e42bd4ed09aa ("net: mscc: ocelot: keep traps in a list") Signed-off-by: Vladimir Oltean <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2022-05-05tcp: allow MPTCP to update the announced windowPaolo Abeni1-1/+1
The MPTCP RFC requires that the MPTCP-level receive window's right edge never moves backward. Currently the MPTCP code enforces such constraint while tracking the right edge, but it does not reflects it on the wire, as MPTCP lacks a suitable hook to update accordingly the TCP header. This change modifies the existing mptcp_write_options() hook, providing the current packet's TCP header to the MPTCP protocol, so that the next patch could implement the above mentioned constraint. No functional changes intended. Signed-off-by: Paolo Abeni <[email protected]> Signed-off-by: Mat Martineau <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2022-05-05net: Fix features skip in for_each_netdev_feature()Tariq Toukan1-2/+2
The find_next_netdev_feature() macro gets the "remaining length", not bit index. Passing "bit - 1" for the following iteration is wrong as it skips the adjacent bit. Pass "bit" instead. Fixes: 3b89ea9c5902 ("net: Fix for_each_netdev_feature on Big endian") Signed-off-by: Tariq Toukan <[email protected]> Reviewed-by: Gal Pressman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2022-05-05net: Make msg_zerocopy_alloc staticDavid Ahern1-1/+0
msg_zerocopy_alloc is only used by msg_zerocopy_realloc; remove the export and make static in skbuff.c Signed-off-by: David Ahern <[email protected]> Acked-by: Jonathan Lemon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2022-05-05Merge tag 'folio-5.18f' of git://git.infradead.org/users/willy/pagecacheLinus Torvalds1-1/+4
Pull folio fixes from Matthew Wilcox: "Two folio fixes for 5.18. Darrick and Brian have done amazing work debugging the race I created in the folio BIO iterator. The readahead problem was deterministic, so easy to fix. - Fix a race when we were calling folio_next() in the BIO folio iter without holding a reference, meaning the folio could be split or freed, and we'd jump to the next page instead of the intended next folio. - Fix readahead creating single-page folios instead of the intended large folios when doing reads that are not a power of two in size" * tag 'folio-5.18f' of git://git.infradead.org/users/willy/pagecache: mm/readahead: Fix readahead with large folios block: Do not call folio_next() on an unreferenced folio
2022-05-05io_uring: add POLL_FIRST support for send/sendmsg and recv/recvmsgJens Axboe1-0/+10
If IORING_RECVSEND_POLL_FIRST is set for recv/recvmsg or send/sendmsg, then we arm poll first rather than attempt a receive or send upfront. This can be useful if we expect there to be no data (or space) available for the request, as we can then avoid wasting time on the initial issue attempt. Reviewed-by: Hao Xu <[email protected]> Signed-off-by: Jens Axboe <[email protected]>
2022-05-05Revert "Merge branch 'mlxsw-line-card-model'"Jakub Kicinski2-22/+1
This reverts commit 5e927a9f4b9f29d78a7c7d66ea717bb5c8bbad8e, reversing changes made to cfc1d91a7d78cf9de25b043d81efcc16966d55b3. The discussion is still ongoing so let's remove the uAPI until the discussion settles. Link: https://lore.kernel.org/all/[email protected]/ Reviewed-by: Ido Schimmel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2022-05-05Revert "fbdev: fbmem: add a helper to determine if an aperture is used by a ↵Alex Deucher1-1/+0
fw fb" This reverts commit 9a45ac2320d0a6ae01880a30d4b86025fce4061b. This was added a helper for amdgpu to workaround a runtime pm regression caused by a runtime pm fix in efifb. We now have a better workaround in amdgpu in commit f95af4a9236695 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)") so this workaround is no longer necessary. Since amdgpu was the only user of this interface, we can remove it. Reviewed-by: Javier Martinez Canillas <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-05termbits: Convert octal defines to hexIlpo Järvinen1-110/+110
Many archs have termbits.h as octal numbers. It makes hard for humans to parse the magnitude of large numbers correctly and to compare with hex ones of the same define. Convert octal values to hex. First step is an automated conversion with: for i in $(git ls-files | grep 'termbits\.h'); do awk --non-decimal-data '/^#define\s+[A-Z][A-Z0-9]*\s+0[0-9]/ { l=int(((length($3) - 1) * 3 + 3) / 4); repl = sprintf("0x%0" l "x", $3); print gensub(/[^[:blank:]]+/, repl, 3); next} {print}' $i > $i~; mv $i~ $i; done On top of that, some manual processing on alignment and number of zeros. In addition, small tweaks to formatting of a few comments on the same lines. Signed-off-by: Ilpo Järvinen <[email protected]> Acked-by: Arnd Bergmann <[email protected]> Acked-by: Michael Ellerman <[email protected]> (powerpc) Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2022-05-05Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski10-13/+27
tools/testing/selftests/net/forwarding/Makefile f62c5acc800e ("selftests/net/forwarding: add missing tests to Makefile") 50fe062c806e ("selftests: forwarding: new test, verify host mdb entries") https://lore.kernel.org/all/[email protected]/ Signed-off-by: Jakub Kicinski <[email protected]>
2022-05-05PCI/PM: Drop the runtime_d3cold device flagRafael J. Wysocki1-4/+0
The runtime_d3cold flag is not needed any more, so drop it. Link: https://lore.kernel.org/r/8077784.T7Z3S40VBb@kreacher Signed-off-by: Rafael J. Wysocki <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Mika Westerberg <[email protected]>
2022-05-05Merge tag 'asahi-soc-rtkit-sart-nvme-for-5.19' of ↵Arnd Bergmann2-0/+208
https://github.com/AsahiLinux/linux into arm/drivers Apple SoC NVMe driver and dependencies: - RTKit IPC library required to boot and communicate with co-processors embedded inside Apple SoCs - SART DMA address filter required to allow some DMA transactions for the NVMe co-processor - NVMe platform driver The following minor changes since v3 on the mailing list have been folded in: - sart: %llx -> %pa for a phys_addr_t - rtkit:/sart: Drop IS_ENABLED inside headers - rtkit: Use EXPORT_SYMBOL_GPL instead of EXPORT_SYMBOL - nvme: Set NVME_REQ_CANCELLED in the timeout handler - nvme: Use DEFINE_SIMPLE_DEV_PM_OPS instead of #ifdef CONFIG_PM_SLEEP * tag 'asahi-soc-rtkit-sart-nvme-for-5.19' of https://github.com/AsahiLinux/linux: nvme-apple: Add initial Apple SoC NVMe driver dt-bindings: nvme: Add Apple ANS NVMe soc: apple: Add SART driver dt-bindings: iommu: Add Apple SART DMA address filter soc: apple: Add RTKit IPC library soc: apple: Always include Makefile Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2022-05-05Merge tag 'net-5.18-rc6' of ↵Linus Torvalds3-3/+4
git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Pull networking fixes from Paolo Abeni: "Including fixes from can, rxrpc and wireguard. Previous releases - regressions: - igmp: respect RCU rules in ip_mc_source() and ip_mc_msfilter() - mld: respect RCU rules in ip6_mc_source() and ip6_mc_msfilter() - rds: acquire netns refcount on TCP sockets - rxrpc: enable IPv6 checksums on transport socket - nic: hinic: fix bug of wq out of bound access - nic: thunder: don't use pci_irq_vector() in atomic context - nic: bnxt_en: fix possible bnxt_open() failure caused by wrong RFS flag - nic: mlx5e: - lag, fix use-after-free in fib event handler - fix deadlock in sync reset flow Previous releases - always broken: - tcp: fix insufficient TCP source port randomness - can: grcan: grcan_close(): fix deadlock - nfc: reorder destructive operations in to avoid bugs Misc: - wireguard: improve selftests reliability" * tag 'net-5.18-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (63 commits) NFC: netlink: fix sleep in atomic bug when firmware download timeout selftests: ocelot: tc_flower_chains: specify conform-exceed action for policer tcp: drop the hash_32() part from the index calculation tcp: increase source port perturb table to 2^16 tcp: dynamically allocate the perturb table used by source ports tcp: add small random increments to the source port tcp: resalt the secret every 10 seconds tcp: use different parts of the port_offset for index and offset secure_seq: use the 64 bits of the siphash for port offset calculation wireguard: selftests: set panic_on_warn=1 from cmdline wireguard: selftests: bump package deps wireguard: selftests: restore support for ccache wireguard: selftests: use newer toolchains to fill out architectures wireguard: selftests: limit parallelism to $(nproc) tests at once wireguard: selftests: make routing loop test non-fatal net/mlx5: Fix matching on inner TTC net/mlx5: Avoid double clear or set of sync reset requested net/mlx5: Fix deadlock in sync reset flow net/mlx5e: Fix trust state reset in reload net/mlx5e: Avoid checking offload capability in post_parse action ...
2022-05-05Merge branch 'irq/gpio-immutable' of ↵Linus Walleij2-0/+18
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel
2022-05-05Merge tag 'stm32-dt-for-v5.19-1' of ↵Arnd Bergmann2-37/+33
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT for v5.19, round 1 Highlights: ---------- -MCU: -Fix pinctrl node names to match with pinctrl yaml. - MPU: -General: - Fix pinctrl node names to match with pinctrl yaml. - Add Protonics boards support based on STM32MP151A SoC: - PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with TI and Micrel 10BaseT Phys and wifi support. - PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity and CO2 sensors. - PRTT1A - 10BaseT1L multi functional controller. - ST boards: - Add RTC support on stm32mp13. - Add button and heartbit support on stm32mp13 DK board. - Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based on OP-TEE OS and SCMI protocol. - DH boards: - Use MCO2 to generate PHY clock and ETHRX clock in order to release internal PLL for a better SD card usage. - Add 1ms PHY post-reset on Avenger96 board to match with PHY requirements. * tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits) ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15 dt-bindings: reset: stm32mp15: rename RST_SCMI define dt-bindings: clock: stm32mp15: rename CK_SCMI define dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure" dt-bindings: rcc: Add optional external ethernet RX clock properties ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131 ARM: dts: stm32: add support for Protonic PRTT1x boards ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards dt-bindings: arm: stm32: correct blank lines dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards ARM: dts: stm32: enable RTC support on stm32mp135f-dk ARM: dts: stm32: add RTC node on stm32mp131 ARM: dts: stm32: Fix PHY post-reset delay on Avenger96 ARM: dts: stm32: fix pinctrl node name warnings (MPU soc) ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2022-05-05Merge tag 'scmi-updates-5.19' of ↵Arnd Bergmann1-6/+25
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers Arm SCMI firmware driver updates/fixes for v5.19 The main theme for most of the changes this time is around the addition of the support for SCMI v3.1 specification changes. Though one of the main addition in the specification is the powercap protocol, that is still work in progress and this set includes all other changes bit and pieces scattered all around the different parts of the specification. There are few bugs discovered during the process and associated fixes and some refactoring to simplify the addition of v3.1 support. It mainly includes the support for extended names, few newly added notifications and async command support. Apart from v3.1 SCMI changes, OPTEE transport gets support for dynamic shared memory. * tag 'scmi-updates-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: (24 commits) firmware: arm_scmi: Fix late checks on pointer dereference firmware: arm_scmi: Support optee shared memory in the optee transport firmware: arm_scmi: Add SCMI v3.1 VOLTAGE_LEVEL_SET_COMPLETE firmware: arm_scmi: Add SCMI v3.1 clock notifications firmware: arm_scmi: Add checks for min/max limits in PERFORMANCE_LIMITS_SET firmware: arm_scmi: Add SCMI v3.1 perf power-cost in microwatts firmware: arm_scmi: Use common iterators in the perf protocol firmware: arm_scmi: Use common iterators in the voltage protocol firmware: arm_scmi: Use common iterators in the clock protocol firmware: arm_scmi: Add SCMI v3.1 SENSOR_AXIS_NAME_GET support firmware: arm_scmi: Use common iterators in the sensor protocol firmware: arm_scmi: Add iterators for multi-part commands firmware: arm_scmi: Parse clock_enable_latency conditionally firmware: arm_scmi: Set clock latency to U32_MAX if it is not supported firmware: arm_scmi: Add SCMI v3.1 protocol extended names support firmware: arm_scmi: Introduce a common SCMI v3.1 .extended_name_get helper firmware: arm_scmi: Split protocol specific definitions in a dedicated header firmware: arm_scmi: Remove unneeded NULL termination of clk name firmware: arm_scmi: Check CLOCK_RATE_SET_COMPLETE async response firmware: arm_scmi: Make name_get operations return a const ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2022-05-05Merge tag 'ffa-updates-5.19' of ↵Arnd Bergmann1-1/+6
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers Arm FF-A firmware driver updates/fixes for v5.19 Couple of fixes to handle fragmented memory descriptors and incorrect UUID parameter passed to ffa_partition_probe. Another fix deals with the incorrect use of ffa_device's driver_data by the core driver. Apart from these fixes, there is an addition of ffa_dev_get_drvdata helper function and its use in optee driver. * tag 'ffa-updates-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: tee: optee: Use ffa_dev_get_drvdata to fetch driver_data firmware: arm_ffa: Add ffa_dev_get_drvdata helper function firmware: arm_ffa: Remove incorrect assignment of driver_data firmware: arm_ffa: Fix uuid parameter to ffa_partition_probe firmware: arm_ffa: Fix handling of fragmented memory descriptors Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2022-05-05Merge tag 'reset-for-v5.19' of git://git.pengutronix.de/pza/linux into ↵Arnd Bergmann1-0/+125
arm/drivers Reset controller updates for v5.19 Add Meson-S4 SoC reset controller support to reset-meson, AST2600 LPC reset controller support to reset-simple, and R9A07G054 USBPHY reset controller support to reset-rzg2l-usbphy-ctrl. Add ACPI _RST support to device_reset(), simplify the uniphier-glue reset driver using bulk API and devres and clean up its dt-bindings docs. Convert most dt-bindings docs from txt to yaml. * tag 'reset-for-v5.19' of git://git.pengutronix.de/pza/linux: dt-bindings: reset: st,sti-powerdown: Convert to yaml dt-bindings: reset: st,sti-picophyreset: Convert to yaml dt-bindings: reset: socfpga: Convert to yaml dt-bindings: reset: snps,axs10x-reset: Convert to yaml dt-bindings: reset: nuvoton,npcm-reset: Convert to yaml dt-bindings: reset: lantiq,reset: Convert to yaml dt-bindings: reset: bitmain,bm1880-reset: Convert to yaml dt-bindings: reset: berlin: Convert to yaml dt-bindings: reset: ath79: Convert to yaml dt-bindings: reset: amlogic,meson-axg-audio-arb: Convert to yaml dt-bindings: reset: uniphier-glue: Clean up clocks, resets, and their names using compatible string reset: Kconfig: Make RESET_RZG2L_USBPHY_CTRL depend on ARCH_RZG2L reset: ACPI reset support reset: simple: Add AST2600 compatible reset: reset-meson: add support for the Meson-S4 SoC Reset Controller dt-bindings: reset: add bindings for the Meson-S4 SoC Reset Controller dt-bindings: reset: Add compatible for Meson-S4 Reset Controller reset: uniphier-glue: Use devm_add_action_or_reset() reset: uniphier-glue: Use reset_control_bulk API Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2022-05-05Merge branch 'irq/gpio-immutable' of ↵Bartosz Golaszewski2-0/+18
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into gpio/for-next This pulls in changes improving the handling of immutable irqchips in core gpiolib and several drivers.
2022-05-05gpio: max732x: Drop unused support for irq and setup code via platform dataUwe Kleine-König1-12/+0
The only user of max732x_platform_data is arch/arm/mach-pxa/littleton.c and it only uses .gpio_base. So drop the other members from the data struct and simplify the driver accordingly. The motivating side effect of this change is that the .remove() callback cannot return a nonzero error code any more which prepares making i2c remove callbacks return void. Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Bartosz Golaszewski <[email protected]>
2022-05-05ASoC: SOF: Add initial header file for ipc4Peter Ujfalusi1-0/+460
The header file contains essential structure definitions, description of bit fields and bits in the ipc4 header and an internally used ipc4 message container definition. Signed-off-by: Peter Ujfalusi <[email protected]> Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Rander Wang <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-05-05regmap: Add bulk read/write callbacks into regmap_configMarek Vasut1-0/+12
Currently the regmap_config structure only allows the user to implement single element register read/write using .reg_read/.reg_write callbacks. The regmap_bus already implements bulk counterparts of both, and is being misused as a workaround for the missing bulk read/write callbacks in regmap_config by a couple of drivers. To stop this misuse, add the bulk read/write callbacks to regmap_config and call them from the regmap core code. Signed-off-by: Marek Vasut <[email protected]> Cc: Jagan Teki <[email protected]> Cc: Mark Brown <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Robert Foss <[email protected]> Cc: Sam Ravnborg <[email protected]> Cc: Thomas Zimmermann <[email protected]> To: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-05-05mm: Add len and flags parameters to arch_get_mmap_end()Christophe Leroy1-1/+1
Powerpc needs flags and len to make decision on arch_get_mmap_end(). So add them as parameters to arch_get_mmap_end(). Signed-off-by: Christophe Leroy <[email protected]> Acked-by: Catalin Marinas <[email protected]> Acked-by: Andrew Morton <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://lore.kernel.org/r/b556daabe7d2bdb2361c4d6130280da7c1ba2c14.1649523076.git.christophe.leroy@csgroup.eu
2022-05-05mm, hugetlbfs: Allow an arch to always use generic versions of ↵Christophe Leroy2-0/+14
get_unmapped_area functions Unlike most architectures, powerpc can only define at runtime if it is going to use the generic arch_get_unmapped_area() or not. Today, powerpc has a copy of the generic arch_get_unmapped_area() because when selection HAVE_ARCH_UNMAPPED_AREA the generic arch_get_unmapped_area() is not available. Rename it generic_get_unmapped_area() and make it independent of HAVE_ARCH_UNMAPPED_AREA. Do the same for arch_get_unmapped_area_topdown() versus HAVE_ARCH_UNMAPPED_AREA_TOPDOWN. Do the same for hugetlb_get_unmapped_area() versus HAVE_ARCH_HUGETLB_UNMAPPED_AREA. Signed-off-by: Christophe Leroy <[email protected]> Reviewed-by: Nicholas Piggin <[email protected]> Acked-by: Andrew Morton <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://lore.kernel.org/r/77f9d3e592f1c8511df9381aa1c4e754651da4d1.1649523076.git.christophe.leroy@csgroup.eu
2022-05-05Merge tag 'renesas-r9a09g011-dt-binding-defs-tag' into renesas-clk-for-v5.19Geert Uytterhoeven1-0/+352
Renesas RZ/V2M DT Binding Definitions Clock definitions for the Renesas RZ/V2M (R9A09G011) SoC, shared by driver and DT source files.
2022-05-05dt-bindings: clock: Add r9a09g011 CPG Clock DefinitionsPhil Edworthy1-0/+352
Define RZ/V2M (R9A09G011) Clock Pulse Generator module clock outputs (CPG_CLK_ON* registers), and reset definitions (CPG_RST_* registers) in Section 48.5 ("Register Description") of the RZ/V2M Hardware User's Manual (Rev. 1.10, Sep. 2021). Signed-off-by: Phil Edworthy <[email protected]> Reviewed-by: Biju Das <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2022-05-05drm: Add DRM-managed mutex_init()Thomas Zimmermann1-0/+3
Add drmm_mutex_init(), a helper that provides managed mutex cleanup. The mutex will be destroyed with the final reference of the DRM device. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Jocelyn Falempe <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-05-05dt-bindings: clock: add clock binding definitions for Exynos Auto v9Chanho Park1-0/+299
Add device tree clock binding definitions for below CMU blocks. - CMU_TOP - CMU_BUSMC - CMU_CORE - CMU_FYS2 - CMU_PERIC0 / C1 - CMU_PERIS Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Chanho Park <[email protected]> Acked-by: Chanwoo Choi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-05-05thunderbolt: Add support for XDomain lane bondingMika Westerberg1-9/+10
The USB4 Inter-Domain Service specification defines a protocol that can be used to establish lane bonding between two USB4 domains (hosts). So far we have not implemented it because the host controller DMA was not fast enough to be able to go over 20 Gbits/s even if lanes were bonded. However, starting from Intel Alder Lake CPUs the DMA can go over 20 Gbits/s so now it makes more sense to add this support to the driver. Because both ends need to negotiate the bonding we add a simple state machine that tracks the connection state and does the necessary steps described by the USB4 Inter-Domain Service specification. We only establish lane bonding when both sides of the link support it. Otherwise we default to use the single lane. Also this is only done when software connection manager is used. On systems with firmware based connection manager, it handles the high-speed tunneling so bonding lanes is specific to the implementation (Intel firmware based connection manager does not support lane bonding). Signed-off-by: Mika Westerberg <[email protected]>
2022-05-05block: Do not call folio_next() on an unreferenced folioMatthew Wilcox (Oracle)1-1/+4
It is unsafe to call folio_next() on a folio unless you hold a reference on it that prevents it from being split or freed. After returning from the iterator, iomap calls folio_end_writeback() which may drop the last reference to the page, or allow the page to be split. If that happens, the iterator will not advance far enough through the bio_vec, leading to assertion failures like the BUG() in folio_end_writeback() that checks we're not trying to end writeback on a page not currently under writeback. Other assertion failures were also seen, but they're all explained by this one bug. Fix the bug by remembering where the next folio starts before returning from the iterator. There are other ways of fixing this bug, but this seems the simplest. Reported-by: Darrick J. Wong <[email protected]> Tested-by: Darrick J. Wong <[email protected]> Reported-by: Brian Foster <[email protected]> Tested-by: Brian Foster <[email protected]> Signed-off-by: Matthew Wilcox (Oracle) <[email protected]>
2022-05-04secure_seq: use the 64 bits of the siphash for port offset calculationWilly Tarreau2-3/+3
SipHash replaced MD5 in secure_ipv{4,6}_port_ephemeral() via commit 7cd23e5300c1 ("secure_seq: use SipHash in place of MD5"), but the output remained truncated to 32-bit only. In order to exploit more bits from the hash, let's make the functions return the full 64-bit of siphash_3u32(). We also make sure the port offset calculation in __inet_hash_connect() remains done on 32-bit to avoid the need for div_u64_rem() and an extra cost on 32-bit systems. Cc: Jason A. Donenfeld <[email protected]> Cc: Moshe Kol <[email protected]> Cc: Yossi Gilad <[email protected]> Cc: Amit Klein <[email protected]> Reviewed-by: Eric Dumazet <[email protected]> Signed-off-by: Willy Tarreau <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2022-05-05dt-bindings: power: imx8mp: add defines for HDMI blk-ctrl domainsLucas Stach1-0/+8
This adds the defines for the power domains provided by the HDMI blk-ctrl on the i.MX8MP. Signed-off-by: Lucas Stach <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-05-05dt-bindings: soc: Add i.MX8MP media block control DT bindingsPaul Elder1-0/+10
The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral providing access to the NoC and ensuring proper power sequencing of the peripherals within the MEDIAMIX domain. Add DT bindings for it. There is already a driver for block controls of other SoCs in the i.MX8M family, so these bindings will expand upon that. Signed-off-by: Paul Elder <[email protected]> Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Lucas Stach <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-05-04Merge tag 'intel-gpio-v5.19-1' of ↵Linus Walleij1-1/+27
git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel intel-gpio for v5.19-1 * Introduce helpers to iterate over GPIO chip nodes and covert some drivers The following is an automated git shortlog grouped by driver: gpiolib: - Introduce a helper to get first GPIO controller node - Introduce gpiochip_node_count() helper - Introduce for_each_gpiochip_node() loop helper pinctrl: - meson: Replace custom code by gpiochip_node_count() call - meson: Enable COMPILE_TEST - meson: Rename REG_* to MESON_REG_* - armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register() - armada-37xx: Switch to use fwnode instead of of_node - samsung: Switch to use for_each_gpiochip_node() helper - samsung: Drop redundant node parameter in samsung_banks_of_node_get() - npcm7xx: Switch to use for_each_gpiochip_node() helper - renesas: rza1: Switch to use for_each_gpiochip_node() helper - renesas: rza1: Replace custom code by gpiochip_node_count() call - stm32: Switch to use for_each_gpiochip_node() helper - stm32: Replace custom code by gpiochip_node_count() call
2022-05-04cfg80211: support disabling EHT modeMuna Sinada2-0/+4
Allow userspace to disable EHT mode during association. Signed-off-by: Muna Sinada <[email protected]> Signed-off-by: Aloka Dixit <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Johannes Berg <[email protected]>
2022-05-04soc: qcom: llcc: Add sc8180x and sc8280xp configurationsBjorn Andersson1-0/+2
Add LLCC configuration data for the SC8180X and SC8280XP platforms, based on the downstream tables. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: Sai Prakash Ranjan <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-05-04Merge branch irq/gic-v3-5.19 into irq/irqchip-nextMarc Zyngier1-0/+2
* irq/gic-v3-5.19: : . : Misc improvements for GICv3: : : - Minimise the number of cases where we need to poll RWP : : - Allow the use of MMIO-based invalidation for LPIs : : - Track GICD/GICR mappings in /proc/iomem : : - Tighten the GICv3 DT binding to avoid endless discussions : on the list... : . irqchip/gic-v3: Claim iomem resources dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicit irqchip/gic-v3: Relax polling of GIC{R,D}_CTLR.RWP irqchip/gic-v3: Detect LPI invalidation MMIO registers irqchip/gic-v3: Exposes bit values for GICR_CTLR.{IR, CES} Signed-off-by: Marc Zyngier <[email protected]>
2022-05-04drm/amdgpu: add GC v11_0_0 family idHawking Zhang1-0/+1
Add GC v11_0_0 family id Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Likun Gao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-04KVM: arm64: vgic-v3: Advertise GICR_CTLR.{IR, CES} as a new GICD_IIDR revisionMarc Zyngier1-0/+3
Since adversising GICR_CTLR.{IC,CES} is directly observable from a guest, we need to make it selectable from userspace. For that, bump the default GICD_IIDR revision and let userspace downgrade it to the previous default. For GICv2, the two distributor revisions are strictly equivalent. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-05-04KVM: arm64: vgic-v3: Implement MMIO-based LPI invalidationMarc Zyngier1-0/+1
Since GICv4.1, it has become legal for an implementation to advertise GICR_{INVLPIR,INVALLR,SYNCR} while having an ITS, allowing for a more efficient invalidation scheme (no guest command queue contention when multiple CPUs are generating invalidations). Provide the invalidation registers as a primitive to their ITS counterpart. Note that we don't advertise them to the guest yet (the architecture allows an implementation to do this). Signed-off-by: Marc Zyngier <[email protected]> Reviewed-by: Oliver Upton <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-05-04KVM: arm64: vgic-v3: Expose GICR_CTLR.RWP when disabling LPIsMarc Zyngier1-2/+2
When disabling LPIs, a guest needs to poll GICR_CTLR.RWP in order to be sure that the write has taken effect. We so far reported it as 0, as we didn't advertise that LPIs could be turned off the first place. Start tracking this state during which LPIs are being disabled, and expose the 'in progress' state via the RWP bit. We also take this opportunity to disallow enabling LPIs and programming GICR_{PEND,PROP}BASER while LPI disabling is in progress, as allowed by the architecture (UNPRED behaviour). We don't advertise the feature to the guest yet (which is allowed by the architecture). Reviewed-by: Oliver Upton <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-05-04irqchip/gic-v3: Exposes bit values for GICR_CTLR.{IR, CES}Marc Zyngier1-0/+2
As we're about to expose GICR_CTLR.{IR,CES} to guests, populate the include file with the architectural values. Signed-off-by: Marc Zyngier <[email protected]> Reviewed-by: Oliver Upton <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-05-04drm/rockchip: Add VOP2 driverAndy Yan1-0/+14
The VOP2 unit is found on Rockchip SoCs beginning with rk3566/rk3568. It replaces the VOP unit found in the older Rockchip SoCs. This driver has been derived from the downstream Rockchip Kernel and heavily modified: - All nonstandard DRM properties have been removed - dropped struct vop2_plane_state and pass around less data between functions - Dropped all DRM_FORMAT_* not known on upstream - rework register access to get rid of excessively used macros - Drop all waiting for framesyncs The driver is tested with HDMI and MIPI-DSI display on a RK3568-EVB board. Overlay support is tested with the modetest utility. AFBC support on the cluster windows is tested with weston-simple-dmabuf-egl on weston using the (yet to be upstreamed) panfrost driver support. Signed-off-by: Andy Yan <[email protected]> Co-Developed-by: Sascha Hauer <[email protected]> Signed-off-by: Sascha Hauer <[email protected]> Tested-by: Michael Riesch <[email protected]> [dt-binding-header:] Acked-by: Rob Herring <[email protected]> [moved dt-binding header from dt-nodes patch to here and made checkpatch --strict happier] Signed-off-by: Heiko Stuebner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-05-04cfg80211: remove cfg80211_get_chan_state()Johannes Berg1-5/+0
We haven't used this function for years, since commit c781944b71f8 ("cfg80211: Remove unused cfg80211_can_use_iftype_chan()") which itself removed a function unused since commit 97dc94f1d933 ("cfg80211: remove channel_switch combination check"), almost eight years ago. Also remove the now unused enum cfg80211_chan_mode and some struct members that were only used for this function. Link: https://lore.kernel.org/r/20220412220958.1a191dca19d7.Ide4448f02d0e2f1ca2992971421ffc1933a5370a@changeid Signed-off-by: Johannes Berg <[email protected]>
2022-05-04opp: Reorder definition of ceil/floor helpersViresh Kumar1-11/+11
Reorder the helpers to keep all freq specific ones, followed by level and bw. No functional change. Signed-off-by: Viresh Kumar <[email protected]>
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