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2022-09-19ASoC: SOF: Intel: replace dev_vdbg with tracepointsBard Liao1-0/+114
This patch replaces all dev_vdbg calls with tracepoints to reduce overhead and enable use of trace collection and analysis tools. Reviewed-by: Péter Ujfalusi <[email protected]> Signed-off-by: Noah Klayman <[email protected]> Signed-off-by: Bard Liao <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-19ASoC: SOF: Intel: add HDA interrupt source tracingNoah Klayman1-0/+34
The Intel HDaudio controller relies on a single interrupt line which wire-ORs multiple interrupt sources, such as stream, IPC, SoundWire and wakes. This patch adds the ability to trace each event occurrence. Reviewed-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Signed-off-by: Noah Klayman <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-19ASoC: SOF: add widget setup/free tracingBard Liao1-0/+44
Enables tracking of use_count during widget setup and free routines. Useful for debugging unbalanced use_counts during suspend/resume. Reviewed-by: Péter Ujfalusi <[email protected]> Signed-off-by: Noah Klayman <[email protected]> Signed-off-by: Bard Liao <[email protected]> Signed-off-by: Pierre-Louis Bossart <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2022-09-19platform_data/emc2305: define platform data for EMC2305 driverMichael Shych1-0/+22
Introduce platform data structure for EM2305 driver to allow configuration device PWMs and thermal zones by passing required platform data to the driver. If no platform data is provided, the driver is supposed to work with default settings. Signed-off-by: Michael Shych <[email protected]> Reviewed-by: Vadim Pasternak <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-09-19pwm: core: Make of_pwm_get() staticAndy Shevchenko1-10/+0
There are no users outside of PWM core of the of_pwm_get(). Make it static. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Uwe Kleine-König <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-09-19pwm: core: Get rid of unused devm_of_pwm_get()Andy Shevchenko1-10/+0
The devm_of_pwm_get() has recently lost its single user, drop the dead API as well. Note, the new code should use either plain pwm_get() or managed devm_pwm_get() or devm_fwnode_pwm_get() APIs. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Uwe Kleine-König <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Guenter Roeck <[email protected]>
2022-09-19genirq: Provide generic_handle_domain_irq_safe().Sebastian Andrzej Siewior1-0/+1
commit 509853f9e1e7b ("genirq: Provide generic_handle_irq_safe()") addressed the problem of demultiplexing interrupt handlers which are force threaded on PREEMPT_RT enabled kernels which means that the demultiplexed handler is invoked with interrupts enabled which triggers a lockdep warning due to a non-irq safe lock acquisition. The same problem exists for the irq domain based interrupt handling via generic_handle_domain_irq() which has been reported against the AMD pin-ctrl driver. Provide generic_handle_domain_irq_safe() which can used from any context. [ tglx: Split the usage sites out and massaged changelog ] Signed-off-by: Sebastian Andrzej Siewior <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Link: https://bugzilla.kernel.org/show_bug.cgi?id=215954
2022-09-19u64_stats: Streamline the implementationThomas Gleixner1-81/+64
The u64 stats code handles 3 different cases: - 32bit UP - 32bit SMP - 64bit with an unreadable #ifdef maze, which was recently expanded with PREEMPT_RT conditionals. Reduce it to two cases (32bit and 64bit) and drop the optimization for 32bit UP as suggested by Linus. Use the new preempt_disable/enable_nested() helpers to get rid of the CONFIG_PREEMPT_RT conditionals. Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Sebastian Andrzej Siewior <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-09-19mm/debug: Provide VM_WARN_ON_IRQS_ENABLED()Thomas Gleixner1-0/+6
Some places in the VM code expect interrupts disabled, which is a valid expectation on non-PREEMPT_RT kernels, but does not hold on RT kernels in some places because the RT spinlock substitution does not disable interrupts. To avoid sprinkling CONFIG_PREEMPT_RT conditionals into those places, provide VM_WARN_ON_IRQS_ENABLED() which is only enabled when VM_DEBUG=y and PREEMPT_RT=n. Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Sebastian Andrzej Siewior <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Michal Hocko <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-09-19preempt: Provide preempt_[dis|en]able_nested()Thomas Gleixner1-0/+42
On PREEMPT_RT enabled kernels, spinlocks and rwlocks are neither disabling preemption nor interrupts. Though there are a few places which depend on the implicit preemption/interrupt disable of those locks, e.g. seqcount write sections, per CPU statistics updates etc. To avoid sprinkling CONFIG_PREEMPT_RT conditionals all over the place, add preempt_disable_nested() and preempt_enable_nested() which should be descriptive enough. Add a lockdep assertion for the !PREEMPT_RT case to catch callers which do not have preemption disabled. Suggested-by: Linus Torvalds <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Sebastian Andrzej Siewior <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-09-19habanalabs/gaudi2: add secured attestation info uapiDani Liberman1-0/+43
User will provide a nonce via the ioctl, and will retrieve secured attestation data of the boot, generated using given nonce. Signed-off-by: Dani Liberman <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2022-09-19habanalabs: new notifier events for device stateTal Cohen1-0/+4
Add new notifier events that inform several device states. General H/W error raised on device general H/W error occurs. User engine error is raised when a device engine informs of an error. Signed-off-by: Tal Cohen <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2022-09-19dt-bindings: clock: imx93-clock: add more MU/SAI clocksPeng Fan1-1/+8
Add MU[1,2]_[A,B] clock entries. Add SAI IPG clock entries. Acked-by: Rob Herring <[email protected]> Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-09-19dt-bindings: clock: imx8mm: don't use multiple blank linesMarcel Ziswiler1-1/+0
Avoid the following checkpatch warning: include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use multiple blank lines Signed-off-by: Marcel Ziswiler <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-09-19wifi: brcmfmac: pcie: Read Apple OTP informationHector Martin1-0/+1
On Apple platforms, the One Time Programmable ROM in the Broadcom chips contains information about the specific board design (module, vendor, version) that is required to select the correct NVRAM file. Parse this OTP ROM and extract the required strings. Note that the user OTP offset/size is per-chip. This patch does not add any chips yet. Reviewed-by: Arend van Spriel <[email protected]> Signed-off-by: Hector Martin <[email protected]> Signed-off-by: Russell King (Oracle) <[email protected]> Signed-off-by: Kalle Valo <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-09-18soc: sunxi: sram: Return void from the release functionSamuel Holland1-1/+1
There is no point in returning an error here, as the caller can do nothing about it. In fact, all callers already ignore the return value. Acked-by: Jernej Skrabec <[email protected]> Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Heiko Stuebner <[email protected]> Tested-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jernej Skrabec <[email protected]>
2022-09-18Merge tag 'parisc-for-6.0-3' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc architecture fixes from Helge Deller: "Some small parisc architecture fixes for 6.0-rc6: One patch lightens up a previous commit and thus unbreaks building the debian kernel, which tries to configure a 64-bit kernel with the ARCH=parisc environment variable set. The other patches fixes asm/errno.h includes in the tools directory and cleans up memory allocation in the iosapic driver. Summary: - Allow configuring 64-bit kernel with ARCH=parisc - Fix asm/errno.h includes in tools directory for parisc and xtensa - Clean up iosapic memory allocation - Minor typo and spelling fixes" * tag 'parisc-for-6.0-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Allow CONFIG_64BIT with ARCH=parisc parisc: remove obsolete manual allocation aligning in iosapic tools/include/uapi: Fix <asm/errno.h> for parisc and xtensa Input: hp_sdc: fix spelling typo in comment parisc: ccio-dma: Add missing iounmap in error path in ccio_probe()
2022-09-18drm/panel: drop DSC pps pointerDmitry Baryshkov1-7/+0
Complete the move of DSC data pointer from struct drm_panel to struct mipi_dsi_device. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/493309/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2022-09-18drm/mipi-dsi: pass DSC data through the struct mipi_dsi_deviceDmitry Baryshkov1-0/+2
The commit 0f40ba48de3b ("drm/msm/dsi: Pass DSC params to drm_panel") added a pointer to the DSC data to the struct drm_panel. However DSC support is not limited to the DSI panels. MIPI DSI bridges can also consume DSC command streams. Thus add struct drm_dsc_config pointer to the struct mipi_dsi_device. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/493306/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2022-09-18habanalabs: trace DMA allocationsOhad Sharabi1-8/+11
This patch add tracepoints in the code for DMA allocation. The main purpose is to be able to cross data with the map operations and determine whether memory violation occurred, for example free DMA allocation before unmapping it from device memory. To achieve this the DMA alloc/free code flows were refactored so that a single DMA tracepoint will catch many flows. To get better understanding of what happened in the DMA allocations the real allocating function is added to the trace as well. Signed-off-by: Ohad Sharabi <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Reviewed-by: Steven Rostedt (Google) <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2022-09-18habanalabs: define trace eventsOhad Sharabi1-0/+90
This patch adds trace events for habanalabs driver to gain all the benefits such an infrastructure can supply. The following events were added: - MMU map/unmap: to be able to track driver's memory allocations - DMA alloc/free: to track our DMA allocation the above trace points in conjunction will help us map the device memory usage as well as to be able to track memory violations. Signed-off-by: Ohad Sharabi <[email protected]> Acked-by: Oded Gabbay <[email protected]> Reviewed-by: Steven Rostedt (Google) <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2022-09-18habanalabs: expose device security status using info ioctlOfir Bitton1-1/+2
In order for the user to know if he is running on a secured device or not, we add it also to the hw_ip info ioctl. Signed-off-by: Ofir Bitton <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2022-09-18habanalabs/gaudi2: new API to control engine cores running modeTal Cohen1-4/+34
The current flow of halting the engine cores is implemented by command buffers built by the user space and sent towards the Driver. This current flow is broken since the user space does not know when the cores actually halt as sending a workload is async op. Therefore the application can not free the memory that is mapped to the engine cores. This new API allows the user space to control the running mode. The API call is sync (returns after the cores are set to the requested mode). Signed-off-by: Tal Cohen <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2022-09-18habanalabs/uapi: move defines to better place inside fileOded Gabbay1-15/+15
Cosmetic change to move the eventfd events defines to a better location in the file, closer to other INFO IOCTL defines. Signed-off-by: Oded Gabbay <[email protected]>
2022-09-18habanalabs: add uapi to retrieve engines statusDani Liberman1-0/+9
Currently, to get engines status, user needed to read debugfs file with root permissions. This new uapi allows user apace apps retrieve status, so for example, in case of failure, status can be retrieved immediately by the application itself which runs without root permissions. Signed-off-by: Dani Liberman <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2022-09-18habanalabs: fix spelling mistakesBharat Jauhari1-5/+5
Cosmetic commit, no logical changes. It just fixes the spelling mistakes. Signed-off-by: Bharat Jauhari <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2022-09-17soc: apple: rtkit: Add apple_rtkit_pollHector Martin1-0/+12
This allows a client to receive messages in atomic context, by polling. Signed-off-by: Hector Martin <[email protected]> Signed-off-by: Russell King (Oracle) <[email protected]> Reviewed-by: Sven Peter <[email protected]> Reviewed-by: Eric Curtin <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2022-09-17clk: rockchip: Add dt-binding header for RV1126Jagan Teki1-0/+632
Add the dt-bindings header for the Rockchip RV1126, that gets shared between the clock controller and the clock references in the dts. Acked-by: Rob Herring <[email protected]> Signed-off-by: Finley Xiao <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
2022-09-17efi/libstub: add some missing EFI prototypesArd Biesheuvel1-0/+12
Define the correct prototypes for the load_image, start_image and unload_image boot service pointers so we can call them from the EFI zboot code. Also add some prototypes related to installation and deinstallation of protocols in to the EFI protocol database, including some definitions related to device paths. Signed-off-by: Ard Biesheuvel <[email protected]>
2022-09-17dt-bindings: firmware: add missing resource IDs for imx8dxlShenwei Wang1-0/+7
Add the missing resource IDs for imx8dxl. Signed-off-by: Shenwei Wang <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-09-17dt-bindings: soc: add i.MX93 mediamix blk ctrlPeng Fan1-0/+15
Add DT bindings for i.MX93 MEDIAMIX BLK CTRL. Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Peng Fan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-09-17dt-bindings: soc: imx: add i.MX8MP vpu blk ctrlPeng Fan1-0/+4
i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse the i.MX8MM VPU blk ctrl yaml file. And add description for the items. Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Peng Fan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-09-17dt-bindings: power: imx8mp-power: add HDMI HDCP/HRVPeng Fan1-0/+2
Add i.MX8MP HDMI HDCP and HRV entries. Acked-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Peng Fan <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-09-17dt-bindings: clk: imx8mm: don't use multiple blank linesMarcel Ziswiler1-1/+0
Avoid the following checkpatch warning: include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use multiple blank lines Signed-off-by: Marcel Ziswiler <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2022-09-16drm/plane-helper: Add a drm_plane_helper_atomic_check() helperJavier Martinez Canillas1-0/+1
Provides a default plane state check handler for primary planes that are a fullscreen scanout buffer and whose state scale and position can't change. There are some drivers that duplicate this logic in their helpers, such as simpledrm and ssd130x. Factor out this common code into a plane helper and make drivers use it. Suggested-by: Thomas Zimmermann <[email protected]> Signed-off-by: Javier Martinez Canillas <[email protected]> Reviewed-by: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-09-16Merge tag 'linux-can-next-for-6.1-20220915' of ↵David S. Miller5-4/+115
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next Marc Kleine-Budde says: ==================== Sept. 15, 2022, 8:19 a.m. UTC Hello Jakub, hello David, this is a pull request of 23 patches for net-next/master. the first 2 patches are by me and fix a typo in the rx-offload helper and the flexcan driver. Christophe JAILLET's patch cleans up the error handling in rcar_canfd driver's probe function. Kenneth Lee's patch converts the kvaser_usb driver from kcalloc() to kzalloc(). Biju Das contributes 2 patches to the sja1000 driver which update the DT bindings and support for the RZ/N1 SJA1000 CAN controller. Jinpeng Cui provides 2 patches that remove redundant variables from the sja1000 and kvaser_pciefd driver. 2 patches by John Whittington and me add hardware timestamp support to the gs_usb driver. Gustavo A. R. Silva's patch converts the etas_es58x driver to make use of DECLARE_FLEX_ARRAY(). Krzysztof Kozlowski's patch cleans up the sja1000 DT bindings. Dario Binacchi fixes his invalid email in the flexcan driver documentation. Ziyang Xuan contributes 2 patches that clean up the CAN RAW protocol. Yang Yingliang's patch switches the flexcan driver to dev_err_probe(). The last 7 patches are by Oliver Hartkopp and add support for the next generation of the CAN protocol: CAN with eXtended data Length (CAN XL). ==================== Signed-off-by: David S. Miller <[email protected]>
2022-09-16Merge tag 'psy-linear-range-for-v6.1-signed' into psy-nextSebastian Reichel1-0/+11
Immutable branch between linear range and power-supply for driver changes in MT6370. Signed-off-by: Sebastian Reichel <[email protected]>
2022-09-16lib: add linear range index macroChiaEn Wu1-0/+11
Add linear_range_idx macro for declaring the linear_range struct simply. Reviewed-by: Matti Vaittinen <[email protected]> Signed-off-by: ChiaEn Wu <[email protected]> Signed-off-by: Sebastian Reichel <[email protected]>
2022-09-16bpf: Move bpf_dispatcher function out of ftrace locationsJiri Olsa1-0/+7
The dispatcher function is attached/detached to trampoline by dispatcher update function. At the same time it's available as ftrace attachable function. After discussion [1] the proposed solution is to use compiler attributes to alter bpf_dispatcher_##name##_func function: - remove it from being instrumented with __no_instrument_function__ attribute, so ftrace has no track of it - but still generate 5 nop instructions with patchable_function_entry(5) attribute, which are expected by bpf_arch_text_poke used by dispatcher update function Enabling HAVE_DYNAMIC_FTRACE_NO_PATCHABLE option for x86, so __patchable_function_entries functions are not part of ftrace/mcount locations. Adding attributes to bpf_dispatcher_XXX function on x86_64 so it's kept out of ftrace locations and has 5 byte nop generated at entry. These attributes need to be arch specific as pointed out by Ilya Leoshkevic in here [2]. The dispatcher image is generated only for x86_64 arch, so the code can stay as is for other archs. [1] https://lore.kernel.org/bpf/[email protected]/ [2] https://lore.kernel.org/bpf/[email protected]/ Suggested-by: Peter Zijlstra (Intel) <[email protected]> Signed-off-by: Jiri Olsa <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Link: https://lore.kernel.org/bpf/[email protected]
2022-09-16ftrace: Add HAVE_DYNAMIC_FTRACE_NO_PATCHABLEPeter Zijlstra (Intel)1-1/+10
x86 will shortly start using -fpatchable-function-entry for purposes other than ftrace, make sure the __patchable_function_entry section isn't merged in the mcount_loc section. Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Jiri Olsa <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]> Link: https://lore.kernel.org/bpf/[email protected]
2022-09-16bpf: Use bpf_capable() instead of CAP_SYS_ADMIN for blinding decisionYauheni Kaliuta1-1/+1
The full CAP_SYS_ADMIN requirement for blinding looks too strict nowadays. These days given unprivileged BPF is disabled by default, the main users for constant blinding coming from unprivileged in particular via cBPF -> eBPF migration (e.g. old-style socket filters). Signed-off-by: Yauheni Kaliuta <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]> Link: https://lore.kernel.org/bpf/[email protected] Link: https://lore.kernel.org/bpf/[email protected]
2022-09-16Merge tag 'v6.0-rc5' into i2c/for-mergewindowWolfram Sang76-215/+615
Linux 6.0-rc5
2022-09-17ata: libahci_platform: Add function returning a clock-handle by idSerge Semin1-0/+3
Since all the clocks are retrieved by the method ahci_platform_get_resources() there is no need for the LLD (glue) drivers to be looking for some particular of them in the kernel clocks table again. Instead we suggest to add a simple method returning a device-specific clock with passed connection ID if it is managed to be found. Otherwise the function will return NULL. Thus the glue-drivers won't need to either manually touching the hpriv->clks array or calling clk_get()-friends. The AHCI platform drivers will be able to use the new function right after the ahci_platform_get_resources() method invocation and up to the device removal. Note the method is left unused here, but will be utilized in the framework of the DWC AHCI SATA driver being added in the next commit. Signed-off-by: Serge Semin <[email protected]> Signed-off-by: Damien Le Moal <[email protected]>
2022-09-17dt-bindings: ata: ahci: Add platform capability propertiesSerge Semin1-0/+20
In case if the platform doesn't have BIOS or a comprehensive firmware installed then the HBA capability flags will be left uninitialized. As a good alternative we suggest to define the DT-properties with the AHCI platform capabilities describing all the HW-init flags of the corresponding capability register. Luckily there aren't too many of them. SSS - Staggered Spin-up support and MPS - Mechanical Presence Switch support determine the corresponding feature availability for the whole HBA by means of the "hba-cap" property. Each port can have the "hba-port-cap" property initialized indicating that the port supports some of the next functionalities: HPCP - HotPlug capable port, MPSP - Mechanical Presence Switch attached to a port, CPD - Cold Plug detection, ESP - External SATA Port (eSATA), FBSCP - FIS-based switching capable port. Signed-off-by: Serge Semin <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Damien Le Moal <[email protected]>
2022-09-17ata: libahci_platform: Introduce reset assertion/deassertion methodsSerge Semin1-1/+4
Currently the ACHI-platform library supports only the assert and deassert reset signals and ignores the platforms with self-deasserting reset lines. That prone to having the platforms with self-deasserting reset method misbehaviour when it comes to resuming from sleep state after the clocks have been fully disabled. For such cases the controller needs to be fully reset all over after the reference clocks are enabled and stable, otherwise the controller state machine might be in an undetermined state. The best solution would be to auto-detect which reset method is supported by the particular platform and use it implicitly in the framework of the ahci_platform_enable_resources()/ahci_platform_disable_resources() methods. Alas it can't be implemented due to the AHCI-platform library already supporting the shared reset control lines. As [1] says in such case we have to use only one of the next methods: + reset_control_assert()/reset_control_deassert(); + reset_control_reset()/reset_control_rearm(). If the driver had an exclusive control over the reset lines we could have been able to manipulate the lines with no much limitation and just used the combination of the methods above to cover all the possible reset-control cases. Since the shared reset control has already been advertised and couldn't be changed with no risk to breaking the platforms relying on it, we have no choice but to make the platform drivers to determine which reset methods the platform reset system supports. In order to implement both types of reset control support we suggest to introduce the new AHCI-platform flag: AHCI_PLATFORM_RST_TRIGGER, which when passed to the ahci_platform_get_resources() method together with the AHCI_PLATFORM_GET_RESETS flag will indicate that the reset lines are self-deasserting thus the reset_control_reset()/reset_control_rearm() will be used to control the reset state. Otherwise the reset_control_deassert()/reset_control_assert() methods will be utilized. [1] Documentation/driver-api/reset.rst Signed-off-by: Serge Semin <[email protected]> Reviewed-by: Hannes Reinecke <[email protected]> Signed-off-by: Damien Le Moal <[email protected]>
2022-09-16Input: auo-pixcir-ts - drop support for platform dataDmitry Torokhov1-44/+0
Currently there are no users of auo_pixcir_ts_platdata in the mainline, and having it (with legacy gpio numbers) prevents us from converting the driver to gpiod API, so let's drop it. If, in the future, someone wants to use this driver on non-device tree, non-ACPI system, they should use static device properties instead of platform data. Reviewed-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Torokhov <[email protected]>
2022-09-16net: bonding: Share lacpdu_mcast_addr definitionBenjamin Poirier2-2/+3
There are already a few definitions of arrays containing MULTICAST_LACPDU_ADDR and the next patch will add one more use. These all contain the same constant data so define one common instance for all bonding code. Signed-off-by: Benjamin Poirier <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-09-16crypto: hisilicon/qm - get error type from hardware registersWeili Qian1-23/+4
Hardware V3 and later versions support get error type from registers. To be compatible with later hardware versions, get error type from registers instead of fixed marco. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2022-09-16crypto: hisilicon/qm - add UACCE_CMD_QM_SET_QP_INFO supportWeili Qian1-1/+16
To be compatible with accelerator devices of different versions, 'UACCE_CMD_QM_SET_QP_INFO' ioctl is added to obtain queue information in userspace, including queue depth and buffer description size. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2022-09-16crypto: hisilicon/qm - get qp num and depth from hardware registersWeili Qian1-1/+4
Hardware V3 and later versions can obtain qp num and depth supported by the hardware from registers. To be compatible with later hardware versions, get qp num and depth from registers instead of fixed marcos. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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