aboutsummaryrefslogtreecommitdiff
path: root/include
AgeCommit message (Collapse)AuthorFilesLines
2019-04-23net: Change nhc_flags to unsigned charDavid Ahern2-5/+5
nhc_flags holds the RTNH_F flags for a given nexthop (fib{6}_nh). All of the RTNH_F_ flags fit in an unsigned char, and since the API to userspace (rtnh_flags and lower byte of rtm_flags) is 1 byte it can not grow. Make nhc_flags in fib_nh_common an unsigned char and shrink the size of the struct by 8, from 56 to 48 bytes. Update the flags arguments for up netdevice events and fib_nexthop_info which determines the RTNH_F flags to return on a dump/event. The RTNH_F flags are passed in the lower byte of rtm_flags which is an unsigned int so use a temp variable for the flags to fib_nexthop_info and combine with rtm_flags in the caller. Signed-off-by: David Ahern <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-04-23lwtunnel: Pass encap and encap type attributes to lwtunnel_fill_encapDavid Ahern1-3/+4
Currently, lwtunnel_fill_encap hardcodes the encap and encap type attributes as RTA_ENCAP and RTA_ENCAP_TYPE, respectively. The nexthop objects want to re-use this code but the encap attributes passed to userspace as NHA_ENCAP and NHA_ENCAP_TYPE. Since that is the only difference, change lwtunnel_fill_encap to take the attribute type as an input. Signed-off-by: David Ahern <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-04-24drm/legacy: remove some legacy lock struct membersDave Airlie2-2/+6
This removes these unless legacy is enabled. The lock count init is unneeded anyways since it's kzalloc. Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2019-04-24drm/legacy: place all drm legacy members under DRM_LEGACY.Dave Airlie1-1/+2
This places a bunch of the legacy members of drm_device into only being there when legacy is enabled. Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2019-04-24drm/legacy: move drm_legacy_master_rmmaps to non-driver legacy header.Dave Airlie1-2/+0
This isn't used by drivers, and won't be in the future. Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2019-04-24Merge tag 'drm-msm-next-2019-04-21' of ↵Dave Airlie1-0/+14
https://gitlab.freedesktop.org/drm/msm into drm-next This time around it is a bunch of cleanup and fixes, expanding gpu "zap" shader support (so we can take the GPU out of secure mode on boot) to a6xx, and small UABI extension to support robustness (see mesa MR 673). Signed-off-by: Dave Airlie <[email protected]> From: Rob Clark <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsHwsEfi4y2LYKSqeqDEYvffwVgKhiP8jHcHpxp13J5LQ@mail.gmail.com
2019-04-24Merge branch 'drm-next-5.2' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie1-0/+8
into drm-next - Add the amdgpu specific bits for timeline support - Add internal interfaces for xgmi pstate support - DC Z ordering fixes for planes - Add support for NV12 planes in DC - Add colorspace properties for planes in DC - eDP optimizations if the GOP driver already initialized eDP - DC bandwidth validation tracing support Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-24Merge tag 'drm/tegra/for-5.2-rc1' of ↵Dave Airlie1-26/+87
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v5.2-rc1 This contains a fix for the usage of shared resets that previously generated a WARN on boot. In addition, there's a fix for CPU cache maintenance of GEM buffers allocated using get_pages(). (airlied: contains a merge from a shared tegra tree) Signed-off-by: Dave Airlie <[email protected]> From: Thierry Reding <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-23ipv6: convert fib6_ref to refcount_tEric Dumazet1-4/+4
We suspect some issues involving fib6_ref 0 -> 1 transitions might cause strange syzbot reports. Lets convert fib6_ref to refcount_t to catch them earlier. Signed-off-by: Eric Dumazet <[email protected]> Cc: Wei Wang <[email protected]> Acked-by: Wei Wang <[email protected]> Reviewed-by: David Ahern <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-04-24Merge tag 'drm-misc-next-2019-04-18' of ↵Dave Airlie8-37/+188
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v5.2: UAPI Changes: - Document which feature flags belong to which command in virtio_gpu.h - Make the FB_DAMAGE_CLIPS available for atomic userspace only, it's useless for legacy. Cross-subsystem Changes: - Add device tree bindings for lg,acx467akm-7 panel and ST-Ericsson Multi Channel Display Engine MCDE - Add parameters to the device tree bindings for tfp410 - iommu/io-pgtable: Add ARM Mali midgard MMU page table format - dma-buf: Only do a 64-bits seqno compare when driver explicitly asks for it, else wraparound. - Use the 64-bits compare for dma-fence-chains Core Changes: - Make the fb conversion functions use __iomem dst. - Rename drm_client_add to drm_client_register - Move intel_fb_initial_config to core. - Add a drm_gem_objects_lookup helper - Add drm_gem_fence_array helpers, and use it in lima. - Add drm_format_helper.c to kerneldoc. Driver Changes: - Add panfrost driver for mali midgard/bitfrost. - Converts bochs to use the simple display type. - Small fixes to sun4i, tinydrm, ti-fp410. - Fid aspeed's Kconfig options. - Make some symbols/functions static in lima, sun4i and meson. - Add a driver for the lg,acx467akm-7 panel. Signed-off-by: Dave Airlie <[email protected]> From: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-23Merge tag 'mlx5-updates-2019-04-22' of ↵David S. Miller2-0/+7
git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5-updates-2019-04-22 This series includes updates to mlx5e driver RX data path and some significant XDP RX/TX improvements to overcome/mitigate HW and PCIE bottlenecks. From Tariq: 1) Some Enhancements in rq->flags 2) Stabilize RX packet rate (on Striding RQ) with multiple outstanding UMR posts In this patch, we add support for multiple outstanding UMR posts, to allow faster gap closure between consuming MPWQEs and reposting them back into the WQ. Performance test: As expected, huge improvement in large-scale (48 cores). xdp_redirect_map, 64B UDP multi-stream. Redirect from ConnectX-5 100Gbps to ConnectX-6 100Gbps. CPU: Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz. Before: Unstable, 7 to 30 Mpps After: Stable, at 70.5 Mpps From Shay: 3) XDP, Inline small packets into the TX MPWQE in XDP xmit flow Upon high packet rate with multiple CPUs TX workloads, much of the HCA's resources are spent on prefetching TX descriptors, thus affecting transmission rates. This patch comes to mitigate this problem by moving some workload to the CPU and reducing the HW data prefetch overhead for small packets (<= 256B). When forwarding packets with XDP, a packet that is smaller than a certain size (set to ~256 bytes) would be sent inline within its WQE TX descrptor (mem-copied), when the hardware tx queue is congested beyond a pre-defined water-mark. Performance: Tested packet rate for UDP 64Byte multi-stream over two dual port ConnectX-5 100Gbps NICs. CPU: Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz * Tested with hyper-threading disabled XDP_TX: | | before | after | | | 24 rings | 51Mpps | 116Mpps | +126% | | 1 ring | 12Mpps | 12Mpps | same | XDP_REDIRECT: ** Below is the transmit rate, not the redirection rate which might be larger, and is not affected by this patch. | | before | after | | | 32 rings | 64Mpps | 92Mpps | +43% | | 1 ring | 6.4Mpps | 6.4Mpps | same | As we can see, feature significantly improves scaling, without hurting single ring performance. From Maxim: 4) Some trivial refactoring and code improvements prior to a larger series to support AF_XDP. ==================== Acked-by: Jakub Kicinski <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-04-24Merge tag 'drm-intel-next-2019-04-17' of ↵Dave Airlie2-53/+141
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - uAPI "Fixes:" patch for the upcoming kernel 5.1, included here too We have an Ack from the media folks (only current user) for this late tweak Cross-subsystem Changes: - ALSA: hda: Fix racy display power access (Takashi, Chris) Driver Changes: - DDI and MIPI-DSI clocks fixes for Icelake (Vandita) - Fix Icelake frequency change/locking (RPS) (Mika) - Temporarily disable ppGTT read-only bit on Icelake (Mika) - Add missing Icelake W/As (Mika) - Enable 12 deep CSB status FIFO on Icelake (Mika) - Inherit more Icelake code for Elkhartlake (Bob, Jani) - Handle catastrophic error on engine reset (Mika) - Shortcut readiness to reset check (Mika) - Regression fix for GEM_BUSY causing us to report a mixed uabi-class request as not busy (Chris) - Revert back to max link rate and lane count on eDP (Jani) - Fix pipe BPP readout for BXT/GLK DSI (Ville) - Set DP min_bpp to 8*3 for non-RGB output formats (Ville) - Enable coarse preemption boundaries for Gen8 (Chris) - Do not enable FEC without DSC (Ville) - Restore correct BXT DDI latency optim setting calculation (Ville) - Always reset context's RING registers to avoid running workload twice during reset (Chris) - Set GPU wedged on driver unload (Janusz) - Consolidate two similar barries from timeline into one (Chris) - Only reset the pinned kernel contexts on resume (Chris) - Wakeref tracking improvements (Chris, Imre) - Lockdep fixes for shrinker interactions (Chris) - Bump ready tasks ahead of busywaits in prep of semaphore use (Chris) - Huge step in splitting display code into fine grained files (Jani) - Refactor the IRQ init/reset macros for code saving (Paulo) - Convert IRQ initialization code to uncore MMIO access (Paulo) - Convert workarounds code to use uncore MMIO access (Chris) - Nuke drm_crtc_state and use intel_atomic_state instead (Manasi) - Update SKL clock-gating WA (Radhakrishna, Ville) - Isolate GuC reset code flow (Chris) - Expose force_dsc_enable through debugfs (Manasi) - Header standalone compile testing framework (Jani) - Code cleanups to reduce driver footprint (Chris) - PSR code fixes and cleanups (Jose) - Sparse and kerneldoc updates (Chris) - Suppress spurious combo PHY B warning (Vile) Signed-off-by: Dave Airlie <[email protected]> From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-04-23PCI/ACPI: Advertise _HPX Type 3 support via _OSCAlexandru Gagniuc1-1/+2
_OSC now has a way to inform firmware that OS has the capability to interpret _HPX Type 3 setting records. This was added by the following PCI Firmware Specification ECN: ECN: _HPX and PCIe Completion Timeout related _OSC Enhancements Date: September 12, 2018 Affected Document: PCI Firmware Specification, Rev. 3.2 Signed-off-by: Alexandru Gagniuc <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-04-23PCI/ACPI: Implement _HPX Type 3 Setting RecordAlexandru Gagniuc1-0/+48
The _HPX Type 3 Setting Record is intended to be more generic and allow configuration of settings not possible with Type 2 records. For example, firmware could ensure that the completion timeout value is set accordingly throughout the PCI tree. Implement support for _HPX Type 3 Setting Records, which were added in the ACPI 6.3 spec. Link: https://lore.kernel.org/lkml/[email protected] Signed-off-by: Alexandru Gagniuc <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-04-23PCI/ACPI: Remove the need for 'struct hotplug_params'Alexandru Gagniuc1-10/+8
We used to first parse all the _HPP and _HPX tables before using the information to program registers of PCIe devices. Up through HPX Type 2, there was only one structure of each type, so we could cheat and store it on the stack. With HPX Type 3 we get an arbitrary number of entries, so the above model doesn't scale that well. Instead of parsing all tables at once, parse and program each entry separately. For _HPP and _HPX Types 0 through 2, this is functionally equivalent. The change enables the upcoming _HPX Type 3 to integrate more easily. Link: https://lore.kernel.org/lkml/[email protected] Signed-off-by: Alexandru Gagniuc <[email protected]> [bhelgaas: fix build errors] Signed-off-by: Bjorn Helgaas <[email protected]>
2019-04-23asm-generic: optimize generic uaccess for 8-byte loads and storesChristoph Hellwig1-0/+10
On 64-bit architectures we can also use the direct load/store trick for 8-byte values. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2019-04-23asm-generic: provide entirely generic nommu uaccessChristoph Hellwig1-0/+48
Move the code to implement uaccess using memcpy or direct loads and stores to asm-generic/uaccess.h and make it selectable kconfig option. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2019-04-23arch: mostly remove <asm/segment.h>Christoph Hellwig1-9/+0
A few architectures use <asm/segment.h> internally, but nothing in common code does. Remove all the empty or almost empty versions of it, including the asm-generic one. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2019-04-23asm-generic: don't include <asm/segment.h> from <asm/uaccess.h>Christoph Hellwig1-2/+0
<asm/segment.h> is an odd x86 legacy that we shouldn't force on other architectures. arc used it to bring in mm_context_t, but we can do that inside the arc code easily. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]>
2019-04-23net/mlx5e: XDP, Inline small packets into the TX MPWQE in XDP xmit flowShay Agroskin1-0/+1
Upon high packet rate with multiple CPUs TX workloads, much of the HCA's resources are spent on prefetching TX descriptors, thus affecting transmission rates. This patch comes to mitigate this problem by moving some workload to the CPU and reducing the HW data prefetch overhead for small packets (<= 256B). When forwarding packets with XDP, a packet that is smaller than a certain size (set to ~256 bytes) would be sent inline within its WQE TX descrptor (mem-copied), when the hardware tx queue is congested beyond a pre-defined water-mark. This is added to better utilize the HW resources (which now makes one less packet data prefetch) and allow better scalability, on the account of CPU usage (which now 'memcpy's the packet into the WQE). To load balance between HW and CPU and get max packet rate, we use watermarks to detect how much the HW is congested and move the work loads back and forth between HW and CPU. Performance: Tested packet rate for UDP 64Byte multi-stream over two dual port ConnectX-5 100Gbps NICs. CPU: Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz * Tested with hyper-threading disabled XDP_TX: | | before | after | | | 24 rings | 51Mpps | 116Mpps | +126% | | 1 ring | 12Mpps | 12Mpps | same | XDP_REDIRECT: ** Below is the transmit rate, not the redirection rate which might be larger, and is not affected by this patch. | | before | after | | | 32 rings | 64Mpps | 92Mpps | +43% | | 1 ring | 6.4Mpps | 6.4Mpps | same | As we can see, feature significantly improves scaling, without hurting single ring performance. Signed-off-by: Shay Agroskin <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Signed-off-by: Saeed Mahameed <[email protected]>
2019-04-23Merge branch 'mlx5-next' of ↵Saeed Mahameed1-0/+6
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux
2019-04-23clk: core: replace clk_{readl,writel} with {readl,writel}Jonas Gorski1-15/+0
Now that clk_{readl,writel} is just an alias for {readl,writel}, we can switch all users of clk_* to use the accessors directly and remove the helpers. Signed-off-by: Jonas Gorski <[email protected]> [[email protected]: Also convert renesas file so that this can be compile independently] Signed-off-by: Stephen Boyd <[email protected]>
2019-04-23clk: core: remove powerpc special handlingJonas Gorski1-16/+0
Now that the powerpc clocks are properly marked as big endian, we can remove the special handling for PowerPC. Signed-off-by: Jonas Gorski <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2019-04-23clk: mux: add explicit big endian supportJonas Gorski1-0/+4
Add a clock specific flag to switch register accesses to big endian, to allow runtime configuration of big endian mux clocks. Signed-off-by: Jonas Gorski <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2019-04-23clk: multiplier: add explicit big endian supportJonas Gorski1-0/+4
Add a clock specific flag to switch register accesses to big endian, to allow runtime configuration of big endian multiplier clocks. Signed-off-by: Jonas Gorski <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2019-04-23clk: gate: add explicit big endian supportJonas Gorski1-0/+4
Add a clock specific flag to switch register accesses to big endian, to allow runtime configuration of big endian gated clocks. Signed-off-by: Jonas Gorski <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2019-04-23clk: fractional-divider: add explicit big endian supportJonas Gorski1-0/+4
Add a clock specific flag to switch register accesses to big endian, to allow runtime configuration of big endian fractional divider clocks. Signed-off-by: Jonas Gorski <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2019-04-23clk: divider: add explicit big endian supportJonas Gorski1-0/+4
Add a clock specific flag to switch register accesses to big endian, to allow runtime configuration of big endian divider clocks. Signed-off-by: Jonas Gorski <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2019-04-23net: phy: marvell: add new default led configure for m88e151xJian Shen1-0/+1
The default m88e151x LED configuration is 0x1177, used LED[0] for 1000M link, LED[1] for 100M link, and LED[2] for active. But for some boards, which use LED[0] for link, and LED[1] for active, prefer to be 0x1040. To be compatible with this case, this patch defines a new dev_flag, and set it before connect phy in HNS3 driver. When phy initializing, using the new LED configuration if this dev_flag is set. Signed-off-by: Jian Shen <[email protected]> Signed-off-by: Huazhong Tan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-04-23net: pass net_device argument to the eth_get_headlenStanislav Fomichev1-1/+1
Update all users of eth_get_headlen to pass network device, fetch network namespace from it and pass it down to the flow dissector. This commit is a noop until administrator inserts BPF flow dissector program. Cc: Maxim Krasnyansky <[email protected]> Cc: Saeed Mahameed <[email protected]> Cc: Jeff Kirsher <[email protected]> Cc: [email protected] Cc: Yisen Zhuang <[email protected]> Cc: Salil Mehta <[email protected]> Cc: Michael Chan <[email protected]> Cc: Igor Russkikh <[email protected]> Signed-off-by: Stanislav Fomichev <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]>
2019-04-23flow_dissector: handle no-skb use caseStanislav Fomichev1-5/+0
When called without skb, gather all required data from the __skb_flow_dissect's arguments and use recently introduces no-skb mode of bpf flow dissector. Note: WARN_ON_ONCE(!net) will now trigger for eth_get_headlen users. Signed-off-by: Stanislav Fomichev <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]>
2019-04-23net: plumb network namespace into __skb_flow_dissectStanislav Fomichev1-8/+11
This new argument will be used in the next patches for the eth_get_headlen use case. eth_get_headlen calls flow dissector with only data (without skb) so there is currently no way to pull attached BPF flow dissector program. With this new argument, we can amend the callers to explicitly pass network namespace so we can use attached BPF program. Signed-off-by: Stanislav Fomichev <[email protected]> Reviewed-by: Saeed Mahameed <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]>
2019-04-23flow_dissector: switch kernel context to struct bpf_flow_dissectorStanislav Fomichev3-7/+15
struct bpf_flow_dissector has a small subset of sk_buff fields that flow dissector BPF program is allowed to access and an optional pointer to real skb. Real skb is used only in bpf_skb_load_bytes helper to read non-linear data. The real motivation for this is to be able to call flow dissector from eth_get_headlen context where we don't have an skb and need to dissect raw bytes. Signed-off-by: Stanislav Fomichev <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]>
2019-04-23mmc: sdio: Add helper macro for sdio_driver boilerplateSean Wang1-0/+12
This patch introduces the module_sdio_driver macro which is a convenience macro for SDIO driver modules similar to module_usb_driver. It is intended to be used by drivers which init/exit section does nothing but register/ unregister the SDIO driver. By using this macro it is possible to eliminate a few lines of boilerplate code per SDIO driver. Suggested-by: Marcel Holtmann <[email protected]> Signed-off-by: Sean Wang <[email protected]> Acked-by: Ulf Hansson <[email protected]> Signed-off-by: Marcel Holtmann <[email protected]>
2019-04-23mmc: add SDIO identifiers for MediaTek Bluetooth devicesSean Wang1-0/+2
The SDIO identifier for MediaTek Bluetooth devices were defined in the MediaTek Bluetooth driver. Moving the definitions in MMC header file seems common sense. Signed-off-by: Sean Wang <[email protected]> Signed-off-by: Marcel Holtmann <[email protected]>
2019-04-23HID: logitech-dj: add support for 27 MHz receiversHans de Goede1-0/+1
Most Logitech wireless keyboard and mice using the 27 MHz are hidpp10 devices, add support to logitech-dj for their receivers. Doing so leads to 2 improvements: 1) All these devices share the same USB product-id for their receiver, making it impossible to properly map some special keys / buttons which differ from device to device. Adding support to logitech-dj to see these as hidpp10 devices allows us to get the actual device-id from the keyboard / mouse. 2) It enables battery-monitoring of these devices This patch uses a new HID group for 27Mhz devices, since the logitech-hidpp code needs to be able to differentiate them from other devices instantiated by the logitech-dj code. Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Benjamin Tissoires <[email protected]>
2019-04-23soc: ixp4xx: Uninline several functionsLinus Walleij1-120/+7
These inline functions immediately exploit the static ioremaps for the queue manager memory region. This does not work with multiplatform where everything need to be dynamically remapped, so get rid of these inlines and create new exports for those used by other drivers. Signed-off-by: Linus Walleij <[email protected]>
2019-04-23soc: ixp4xx: npe: Pass addresses as resourcesLinus Walleij1-2/+0
Instead of using hardcoded base addresses implicitly obtained through <linux/io.h>, pass the physical base for the three NPE blocks as memory resources and remap these in the driver. Drop the memory request region business, this will anyways be done by devm_* remapping functions. Signed-off-by: Linus Walleij <[email protected]>
2019-04-23ARM: ixp4xx: Move IXP4xx QMGR and NPE headersLinus Walleij2-0/+244
This moves the IXP4xx Queue Manager and Network Processing Engine headers out of the <mack/*> include path as that is incompatible with multiplatform. Signed-off-by: Linus Walleij <[email protected]>
2019-04-23clocksource/drivers/ixp4xx: Add driverLinus Walleij1-0/+11
This adds a new slightly rewritten timer driver for the Intel IXP4xx clocksource, clockevent and delay timer. Cc: Daniel Lezcano <[email protected]> Cc: Thomas Gleixner <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2019-04-23ACPI/IORT: Check ATS capability in root complex nodesJean-Philippe Brucker1-0/+4
Root complex node in IORT has a bit telling whether it supports ATS or not. Store this bit in the IOMMU fwspec when setting up a device, so it can be accessed later by an IOMMU driver. In the future we'll probably want to store this bit at the host bridge or SMMU rather than in each endpoint. Acked-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Jean-Philippe Brucker <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2019-04-23PCI: Add a stub for pci_ats_disabled()Jean-Philippe Brucker1-0/+1
Currently pci_ats_disabled() is only defined when CONFIG_PCI is enabled. Since we're about to use the function in the Arm SMMUv3 driver, which could be built with CONFIG_PCI disabled, add a definition of pci_ats_disabled() for !CONFIG_PCI. Acked-by: Bjorn Helgaas <[email protected]> Signed-off-by: Jean-Philippe Brucker <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2019-04-23PCI: Move ATS declarations outside of CONFIG_PCIJean-Philippe Brucker1-15/+15
At the moment, the ATS functions are only defined when CONFIG_PCI is enabled. Since we're about to use them in the Arm SMMUv3 driver, which could be built with CONFIG_PCI disabled, and they are already guarded by CONFIG_PCI_ATS which depends on CONFIG_PCI, move the definitions outside of CONFIG_PCI. Acked-by: Bjorn Helgaas <[email protected]> Signed-off-by: Jean-Philippe Brucker <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2019-04-23gpio: merrifield: Fix build err without CONFIG_ACPIYueHaibing2-0/+6
When building CONFIG_ACPI is not set gcc warn this: drivers/gpio/gpio-merrifield.c: In function mrfld_gpio_get_pinctrl_dev_name: drivers/gpio/gpio-merrifield.c:388:19: error: dereferencing pointer to incomplete type struct acpi_device put_device(&adev->dev); ^~ Reported-by: Hulk Robot <[email protected]> Fixes: d00d2109c367 ("gpio: merrifield: Convert to use acpi_dev_get_first_match_dev()") Suggested-by: Andy Shevchenko <[email protected]> Signed-off-by: YueHaibing <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Acked-by: Linus Walleij <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2019-04-23gpiolib: Introduce GPIO_LOOKUP_FLAGS_DEFAULTAndy Shevchenko1-0/+2
Since GPIO library operates with enumerator when it's subject to handle the GPIO lookup flags, it will be better to clearly see what default means. Thus, introduce GPIO_LOOKUP_FLAGS_DEFAULT entry to describe the default assumptions. While here, replace 0 by newly introduced constant. Signed-off-by: Andy Shevchenko <[email protected]> Reviewed-by: Mika Westerberg <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2019-04-23gpiolib: Make use of enum gpio_lookup_flags consistentAndy Shevchenko1-4/+4
The library uses enum gpio_lookup_flags to define the possible characteristics of GPIO pin. Since enumerator listed only individual bits the common use of it is in a form of a bitmask of gpio_lookup_flags GPIO_* values. The more correct type for this is unsigned long. Due to above convert all users to use unsigned long instead of enum gpio_lookup_flags except enumerator definition. While here, make field and parameter descriptions consistent as well. Suggested-by: Mika Westerberg <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Reviewed-by: Mika Westerberg <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2019-04-23gpiolib: Indent entry values of enum gpio_lookup_flagsAndy Shevchenko1-8/+8
Indent entry values in the enum gpio_lookup_flags for better readability. No functional change. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Hans de Goede <[email protected]> Reviewed-by: Mika Westerberg <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2019-04-23dt-bindings: pinctrl: stm32: add new entry for package informationAlexandre Torgue1-0/+6
Add "st,package" entry. Possibles values are: -STM32MP_PKG_AA for LFBGA448 (18*18) package -STM32MP_PKG_AB for LFBGA354 (16*16) package -STM32MP_PKG_AC for TFBGA361 (12*12) package -STM32MP_PKG_AD for TFBGA257 (10*10) package Signed-off-by: Alexandre Torgue <[email protected]> Signed-off-by: Linus Walleij <[email protected]>
2019-04-23xfrm: remove unneeded export_symbolsFlorian Westphal1-2/+0
None of them have any external callers, make them static. Signed-off-by: Florian Westphal <[email protected]> Signed-off-by: Steffen Klassert <[email protected]>
2019-04-23xfrm: remove decode_session indirection from afinfo_policyFlorian Westphal1-3/+0
No external dependencies, might as well handle this directly. xfrm_afinfo_policy is now 40 bytes on x86_64. Signed-off-by: Florian Westphal <[email protected]> Signed-off-by: Steffen Klassert <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.