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2020-12-16Merge tag 'arm-soc-drivers-5.11' of ↵Linus Torvalds1-5/+40
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "There are a couple of subsystems maintained by other people that merge their drivers through the SoC tree, those changes include: - The SCMI firmware framework gains support for sensor notifications and for controlling voltage domains. - A large update for the Tegra memory controller driver, integrating it better with the interconnect framework - The memory controller subsystem gains support for Mediatek MT8192 - The reset controller framework gains support for sharing pulsed resets For Soc specific drivers in drivers/soc, the main changes are - The Allwinner/sunxi MBUS gets a rework for the way it handles dma_map_ops and offsets between physical and dma address spaces. - An errata fix plus some cleanups for Freescale Layerscape SoCs - A cleanup for renesas drivers regarding MMIO accesses. - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC identification. - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and SDX55. - A rework of the TI AM33xx 'genpd' power domain support to use information from DT instead of platform data - Support for TI AM64x SoCs - Allow building some Amlogic drivers as modules instead of built-in Finally, there are numerous cleanups and smaller bug fixes for Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips, Renesas, and Xilinx SoCs" * tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits) soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS firmware: xilinx: Properly align function parameter firmware: xilinx: Add a blank line after function declaration firmware: xilinx: Remove additional newline firmware: xilinx: Fix kernel-doc warnings firmware: xlnx-zynqmp: fix compilation warning soc: xilinx: vcu: add missing register NUM_CORE soc: xilinx: vcu: use vcu-settings syscon registers dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding soc: xilinx: vcu: drop useless success message clk: samsung: mark PM functions as __maybe_unused soc: samsung: exynos-chipid: initialize later - with arch_initcall soc: samsung: exynos-chipid: order list of SoCs by name memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe() memory: ti-emif-sram: only build for ARMv7 memory: tegra30: Support interconnect framework memory: tegra20: Support hardware versioning and clean up OPP table initialization dt-bindings: memory: tegra20-emc: Document opp-supported-hw property soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe() reset-controller: ti: force the write operation when assert or deassert ...
2020-12-09firmware: xilinx: Properly align function parameterMichal Simek1-4/+4
Fix parameters alignment reported by checkpatch --strict. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/00ed9fcb94a6c22eff1fe8afdea46b2764a8687d.1606894725.git.michal.simek@xilinx.com
2020-12-09firmware: xilinx: Add a blank line after function declarationMichal Simek1-0/+34
Fix all these issues which are also reported by checkpatch --strict. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/7b6007e05f6c01214861a37f198cd5bee62a4d3e.1606894725.git.michal.simek@xilinx.com
2020-12-09firmware: xilinx: Remove additional newlineMichal Simek1-1/+0
This additional newline is useless and also reported by checkpatch --strict. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/d927f3f2c97910958dd77a22828cd0bf8d89c9de.1606894725.git.michal.simek@xilinx.com
2020-12-09firmware: xlnx-zynqmp: fix compilation warningWendy Liang1-0/+2
Fix compilation warning when ZYNQMP_FIRMWARE is not defined. include/linux/firmware/xlnx-zynqmp.h: In function 'zynqmp_pm_get_eemi_ops': include/linux/firmware/xlnx-zynqmp.h:363:9: error: implicit declaration of function 'ERR_PTR' [-Werror=implicit-function-declaration] 363 | return ERR_PTR(-ENODEV); include/linux/firmware/xlnx-zynqmp.h:363:18: note: each undeclared identifier is reported only once for each function it appears in include/linux/firmware/xlnx-zynqmp.h: In function 'zynqmp_pm_get_api_version': include/linux/firmware/xlnx-zynqmp.h:367:10: error: 'ENODEV' undeclared (first use in this function) 367 | return -ENODEV; | ^~~~~~ Signed-off-by: Wendy Liang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2020-11-24firmware: xilinx: Use hash-table for api feature checkAmit Sunil Dhamne1-4/+0
Currently array of fix length PM_API_MAX is used to cache the pm_api version (valid or invalid). However ATF based PM APIs values are much higher then PM_API_MAX. So to include ATF based PM APIs also, use hash-table to store the pm_api version status. Signed-off-by: Amit Sunil Dhamne <[email protected]> Reported-by: Arnd Bergmann <[email protected]> Signed-off-by: Ravi Patel <[email protected]> Signed-off-by: Rajan Vaja <[email protected]> Reviewed-by: Arnd Bergmann <[email protected]> Tested-by: Michal Simek <[email protected]> Fixes: f3217d6f2f7a ("firmware: xilinx: fix out-of-bounds access") Cc: stable <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2020-04-28firmware: xilinx: Add sysfs and API to set boot health statusRajan Vaja1-0/+7
Add sysfs interface to set boot health status from user space. Add API used by this interface to communicate with firmware. If PMUFW is compiled with CHECK_HEALTHY_BOOT, it will check the healthy bit on FPD WDT expiration. If healthy bit is set by a user application running in Linux, PMUFW will do APU only restart. If healthy bit is not set during FPD WDT expiration, PMUFW will do system restart. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Tejas Patel <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Add sysfs to set shutdown scopeRajan Vaja1-0/+12
The Linux shutdown functionality implemented via PSCI system_off does not include an option to set a scope, i.e. which parts of the system to shut down. This patch creates sysfs that allows to set the shutdown scope for the next shutdown request. When the next shutdown is performed, the platform specific portion of PSCI-system_off can use the chosen shutdown scope. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Stefan Krsmanovic <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Tejas Patel <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Add system shutdown API interfaceRajan Vaja1-0/+6
Add system shutdown API interface which asks firmware to perform system shutdown/restart. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Add sysfs interfaceRajan Vaja1-0/+2
Add firmware-ggs sysfs interface which provides read/write interface to global storage registers. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Tejas Patel <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Add APIs to read/write GGS/PGGS registersRajan Vaja1-0/+24
Add APIs to read/write PGGS and GGS registers. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for fpga related APIsRajan Vaja1-5/+11
Use direct function call instead of using eemi ops for fpga related APIs. Also remove eemi ops structure. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for aes engineRajan Vaja1-1/+5
Use direct function call for aes engine instead of using eemi ops. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for set_requirementRajan Vaja1-4/+10
Use direct function call instead of using eemi ops for set_requirement. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for release_nodeRajan Vaja1-1/+5
Use direct function call instead of using eemi ops for release_node. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for request_nodeRajan Vaja1-4/+8
Use direct function call instead of using eemi ops for request_node. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for set_suspend_modeRajan Vaja1-1/+5
Use direct function call instead of eemi ops for set_suspend_mode. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for init_finalizeRajan Vaja1-1/+5
Use direct function call instead of eemi ops for init_finalize. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for reset_get_statusRajan Vaja1-1/+6
Use direct function call instead of using eemi ops for reset_get_status. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for reset_assertRajan Vaja1-2/+7
Use direct function call instead of using eemi ops for reset_assert. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Use APIs instead of IOCTLsRajan Vaja1-1/+30
Remove IOCTL API and use individual APIs for better readability. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for clock set/get parentRajan Vaja1-2/+10
Use direct function call instead of eemi ops for clock set/get parent. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for clock set/get rateRajan Vaja1-2/+10
Use direct function call instead of eemi ops for clock set/get rate. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for clock_getdividerRajan Vaja1-1/+5
Use direct function call instead of using eemi ops for clock_getdivider. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for clock_setdividerRajan Vaja1-1/+5
Use direct function call instead of using eemi ops for clock_setdivider. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for clock_getstateRajan Vaja1-1/+5
Use direct function call instead of eemi ops for clock_getstate. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for clock_disableRajan Vaja1-1/+5
Use direct function call for clock_disable instead using of eemi ops. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for clock_enableRajan Vaja1-1/+5
Use direct function call for clock_enable instead of eemi ops. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for query_dataRajan Vaja1-1/+6
Use direct function call for query_data instead of using eemi ops. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for get_chipidRajan Vaja1-1/+5
Use direct function call instead of eemi ops for get_chipid. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-28firmware: xilinx: Remove eemi ops for get_api_versionRajan Vaja1-1/+5
Use direct function calls instead of using eemi ops. So remove eemi ops for get_api_version and use direct function call. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-04-03Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-1/+1
Pull ARM SoC updates from Arnd Bergmann: "The code changes are mostly for 32-bit platforms and include: - Lots of updates for the Nvidia Tegra platform, including cpuidle, pmc, and dt-binding changes - Microchip at91 power management updates for the recently added sam9x60 SoC - Treewide setup_irq deprecation by afzal mohammed - STMicroelectronics stm32 gains earlycon support - Renesas platforms with Cortex-A9 can now use the global timer - Some TI OMAP2+ platforms gain cpuidle support - Various cleanups for the i.MX6 and Orion platforms, as well as Kconfig files across all platforms" * tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits) ARM: qcom: Add support for IPQ40xx ARM: mmp: replace setup_irq() by request_irq() ARM: cns3xxx: replace setup_irq() by request_irq() ARM: spear: replace setup_irq() by request_irq() ARM: ep93xx: Replace setup_irq() by request_irq() ARM: iop32x: replace setup_irq() by request_irq() arm: mach-dove: Mark dove_io_desc as __maybe_unused ARM: orion: replace setup_irq() by request_irq() ARM: debug: stm32: add UART early console support for STM32MP1 ARM: debug: stm32: add UART early console support for STM32H7 ARM: debug: stm32: add UART early console configuration for STM32F7 ARM: debug: stm32: add UART early console configuration for STM32F4 cpuidle: tegra: Disable CC6 state if LP2 unavailable cpuidle: tegra: Squash Tegra114 driver into the common driver cpuidle: tegra: Squash Tegra30 driver into the common driver cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle ARM: tegra: cpuidle: Remove unnecessary memory barrier ARM: tegra: cpuidle: Make abort_flag atomic ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2 ARM: tegra: Make outer_disable() open-coded ...
2020-04-01Merge branch 'linus' of ↵Linus Torvalds1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto updates from Herbert Xu: "API: - Fix out-of-sync IVs in self-test for IPsec AEAD algorithms Algorithms: - Use formally verified implementation of x86/curve25519 Drivers: - Enhance hwrng support in caam - Use crypto_engine for skcipher/aead/rsa/hash in caam - Add Xilinx AES driver - Add uacce driver - Register zip engine to uacce in hisilicon - Add support for OCTEON TX CPT engine in marvell" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (162 commits) crypto: af_alg - bool type cosmetics crypto: arm[64]/poly1305 - add artifact to .gitignore files crypto: caam - limit single JD RNG output to maximum of 16 bytes crypto: caam - enable prediction resistance in HRWNG bus: fsl-mc: add api to retrieve mc version crypto: caam - invalidate entropy register during RNG initialization crypto: caam - check if RNG job failed crypto: caam - simplify RNG implementation crypto: caam - drop global context pointer and init_done crypto: caam - use struct hwrng's .init for initialization crypto: caam - allocate RNG instantiation descriptor with GFP_DMA crypto: ccree - remove duplicated include from cc_aead.c crypto: chelsio - remove set but not used variable 'adap' crypto: marvell - enable OcteonTX cpt options for build crypto: marvell - add the Virtual Function driver for CPT crypto: marvell - add support for OCTEON TX CPT engine crypto: marvell - create common Kconfig and Makefile for Marvell crypto: arm/neon - memzero_explicit aes-cbc key crypto: bcm - Use scnprintf() for avoiding potential buffer overflow crypto: atmel-i2c - Fix wakeup fail ...
2020-03-24firmware: xilinx: Add DLL reset supportManish Narani1-1/+8
SD DLL resets are required for some of the operations on ZynqMP platform. Add DLL reset support in ZynqMP firmware driver for SD DLL reset. Signed-off-by: Manish Narani <[email protected]> Acked-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2020-03-09include: linux: firmware: Correct config dependency of zynqmp_eemi_opsTejas Patel1-1/+1
zynqmp_eemi_ops will be compiled only when CONFIG_ZYNQMP_FIRMWARE is enabled. So check for CONFIG_ZYNQMP_FIRMWARE instead of checking for CONFIG_ARCH_ZYNQMP. Signed-off-by: Tejas Patel <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2020-02-28firmware: xilinx: Add ZynqMP aes API for AES functionalityKalyani Akula1-0/+2
Add ZynqMP firmware AES API to perform encryption/decryption of given data. Signed-off-by: Kalyani Akula <[email protected]> Acked-by: Michal Simek <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2020-02-08Merge tag 'armsoc-drivers' of ↵Linus Torvalds1-0/+7
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms: - Nvidia: Fuse support for Tegra194, continued memory controller pieces for Tegra30 - NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC - NXP/FSL: i.MX8MP SoC driver pieces - TI Keystone: ring accelerator driver - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs. - Xilinx ZynqMP: feature checking interface for firmware. Mailbox communication for power management - Overall support patch set for cpuidle on more complex hierarchies (PSCI-based) and misc cleanups, refactorings of Marvell, TI, other platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits) drivers: soc: xilinx: Use mailbox IPI callback dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists MAINTAINERS: Add brcmstb PCIe controller entry soc/tegra: fuse: Unmap registers once they are not needed anymore soc/tegra: fuse: Correct straps' address for older Tegra124 device trees soc/tegra: fuse: Warn if straps are not ready soc/tegra: fuse: Cache values of straps and Chip ID registers memory: tegra30-emc: Correct error message for timed out auto calibration memory: tegra30-emc: Firm up hardware programming sequence memory: tegra30-emc: Firm up suspend/resume sequence soc/tegra: regulators: Do nothing if voltage is unchanged memory: tegra: Correct reset value of xusb_hostr soc/tegra: fuse: Add APB DMA dependency for Tegra20 bus: tegra-aconnect: Remove PM_CLK dependency dt-bindings: mediatek: add MT6765 power dt-bindings soc: mediatek: cmdq: delete not used define memory: tegra: Add support for the Tegra194 memory controller memory: tegra: Only include support for enabled SoCs memory: tegra: Support DVFS on Tegra186 and later ...
2020-01-23clk: zynqmp: Add support for get max dividerRajan Vaja1-0/+1
To achieve best possible rate, maximum limit of divider is required while computation. Get maximum supported divisor from firmware. To maintain backward compatibility assign maximum possible value(0xFFFF) if query for max divisor is not successful. Signed-off-by: Rajan Vaja <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Acked-by: Michal Simek <[email protected]> [[email protected]: Remove else return and just return] Signed-off-by: Stephen Boyd <[email protected]>
2020-01-23clk: zynqmp: Warn user if clock user are more than allowedRajan Vaja1-0/+1
Warn user if clock is used by more than allowed devices. This check is done by firmware and returns respective error code. Upon receiving error code for excessive user, warn user for the same. This change is done to restrict VPLL use count. It is assumed that VPLL is used by one user only. Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Rajan Vaja <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Acked-by: Michal Simek <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2019-12-12drivers: firmware: xilinx: Add support for feature checkRavi Patel1-0/+7
Query for corresponding feature before calling EEMI API from the driver. Signed-off-by: Ravi Patel <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Rajan Vaja <[email protected]>
2019-12-05Merge tag 'armsoc-drivers' of ↵Linus Torvalds1-1/+2
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Olof Johansson: "Various driver updates for platforms: - A larger set of work on Tegra 2/3 around memory controller and regulator features, some fuse cleanups, etc.. - MMP platform drivers, in particular for USB PHY, and other smaller additions. - Samsung Exynos 5422 driver for DMC (dynamic memory configuration), and ASV (adaptive voltage), allowing the platform to run at more optimal operating points. - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas - Clock/reset control driver for TI/OMAP - Meson-A1 reset controller support - Qualcomm sdm845 and sda845 SoC IDs for socinfo" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits) firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT soc: fsl: add RCPM driver dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition memory: tegra: Consolidate registers definition into common header memory: tegra: Ensure timing control debug features are disabled memory: tegra: Introduce Tegra30 EMC driver memory: tegra: Do not handle error from wait_for_completion_timeout() memory: tegra: Increase handshake timeout on Tegra20 memory: tegra: Print a brief info message about EMC timings memory: tegra: Pre-configure debug register on Tegra20 memory: tegra: Include io.h instead of iopoll.h memory: tegra: Adapt for Tegra20 clock driver changes memory: tegra: Don't set EMC rate to maximum on probe for Tegra20 memory: tegra: Add gr2d and gr3d to DRM IOMMU group memory: tegra: Set DMA mask based on supported address bits soc: at91: Add Atmel SFR SN (Serial Number) support memory: atmel-ebi: switch to SPDX license identifiers memory: atmel-ebi: move NUM_CS definition inside EBI driver soc: mediatek: Refactor bus protection control soc: mediatek: Refactor sram control ...
2019-11-20firmware: xilinx: Add SDIO Tap Delay nodesManish Narani1-1/+12
Add tap delay nodes for setting SDIO Tap Delays on ZynqMP platform. Signed-off-by: Manish Narani <[email protected]> Signed-off-by: Ulf Hansson <[email protected]>
2019-10-16soc: xilinx: Set CAP_UNUSABLE requirement for versal while powering down domainTejas Patel1-1/+2
For "0" requirement which is used to inform firmware that device is not required currently by master, Versal PLM (Platform Loader and Manager) which runs on Platform Management Controller and is responsible platform management of devices that disables clock, power it down and reset the device. genpd_power_off() is being called during runtime suspend also. So, if any device goes to runtime suspend state during resumes it needs to be re-initialized again. It is possible that drivers do not reinitialize device upon resume from runtime suspend every time ans so dont want it to be powered down or get reset during runtime suspend. In Versal PLM new PM_CAP_UNUSABLE capability is added, which disables clock only and avoids power down and reset during runtime suspend. Power and reset will be gated with core suspend.So, this patch sets CAPABILITY_UNUSABLE requirement during gpd_power_off() if platform is other than zynqmp. Signed-off-by: Tejas Patel <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2019-06-21firmware: xilinx: zynqmp: Remove unused macroJolly Shah1-1/+0
ZYNQMP_PM_CAPABILITY_POWER capability is not supported by firmware and hence needs to be removed Signed-off-by: Tejas Patel <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2019-04-15firmware: xilinx: Add fpga API'sNava kishore Manne1-0/+12
This Patch Adds fpga API's to support the Bitstream loading by using firmware interface. Signed-off-by: Nava kishore Manne <[email protected]> Reviewed-by: Moritz Fischer <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2019-03-18drivers: Defer probe if firmware is not readyRajan Vaja1-1/+1
Driver needs ZynqMP firmware interface to call EEMI APIs. In case firmware is not ready, dependent drivers should wait until the firmware is ready. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2019-02-12firmware: xilinx: Add APIs to control node status/powerRajan Vaja1-0/+26
Add Xilinx ZynqMP firmware APIs to control node status and power. These APIs allows turning on/off power domain and setting capabilities of devices present in power domain. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2019-02-12firmware: xilinx: Implement ZynqMP power management APIsJolly Shah1-0/+20
Add Xilinx ZynqMP firmware APIs to set suspend mode and inform firmware that master has initialized its own power management. Signed-off-by: Rajan Vaja <[email protected]> Signed-off-by: Jolly Shah <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2019-02-05firmware: xilinx: Add zynqmp_pm_get_chipid() APINava kishore Manne1-0/+2
This patch adds a new API to provide access to the hardware related data like soc revision, IDCODE... etc. Signed-off-by: Nava kishore Manne <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2019-01-29firmware: xilinx: Add reset API'sNava kishore Manne1-0/+136
This Patch Adds reset API's to support release, assert and status functionalities by using firmware interface. Signed-off-by: Nava kishore Manne <[email protected]> Signed-off-by: Michal Simek <[email protected]>