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git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT additional updates for 5.9
For SC7180 this adds the necessary properties for blowing fuses in
qfprom, Coresight fixes, GPU interconnect votes and specifies max speed
for USB controller.
SM8150 and SM8250 gains Adreno SMMU, the graphics management unit and
the GPU nodes, to enable headless GPU usage.
SDM845 gains tracing support for deep idle, GPU bus bandwidth scaling
and DB845c gains the LT9611 HDMI bridge wired up.
MSM8994 gains SMD RPM and SCM support and a new dts for the Sony Xperia
Z5.
MSM8992 is refactored and modernized and gets support for SCM, SPMI,
BLSP2 UART and I2C nodes, PMU, RPM clock controller, PSCI and proper CPU
definitions. Support for the Xiaomi Libra and Microsoft Lumia 950 are
added.
* tag 'qcom-arm64-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (31 commits)
arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree
arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree
arm64: dts: qcom: msm8992: Add RPMCC node
arm64: dts: qcom: msm8992: Add PSCI support.
arm64: dts: qcom: msm8992: Add PMU node
arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes
arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device
arm64: dts: qcom: msm8992: Add a SCM node
arm64: dts: qcom: msm8992: Add a proper CPU map
arm64: dts: qcom: bullhead: Move UART pinctrl to SoC
arm64: dts: qcom: bullhead: Add qcom,msm-id
arm64: dts: qcom: msm8992: Fix SDHCI1
arm64: dts: qcom: msm8992: Modernize the DTS style
arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
arm64: dts: qcom: msm8994: Add support for SMD RPM
arm64: dts: qcom: msm8992: Add a label to rpm-requests
arm64: dts: qcom: msm8994: Add SCM node
arm64: dts: qcom: sdm845-db845c: Add hdmi bridge nodes
arm64: dts: qcom: add sm8250 GPU nodes
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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The Sparx5 support 9 different clock outputs. This include file has
defines for each supported clock ordinal.
Signed-off-by: Lars Povlsen <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
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Add RPMH_REGULATOR_LEVEL_SVS_L0, used by sm8250.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Jonathan Marek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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The "JZ4780_CLK_LCD0PIXCLK" and the "JZ4780_CLK_LCD1PIXCLK"
in the "jz4780.h" and the new added "JZ4780_CLK_EXCLK_DIV512"
in the previous patch is too long, add tabs to other lines
to align them.
Tested-by: 周正 (Zhou Zheng) <[email protected]>
Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
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Add RTC related clocks bindings for the JZ4780 SoC, the X1000 SoC,
and the X1830 SoC from Ingenic.
Tested-by: 周正 (Zhou Zheng) <[email protected]>
Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
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This will be required in order to support the
modem upstream.
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Fixes: f2a76a2955c0 ("clk: qcom: Add Global Clock controller (GCC) driver for SDM660")
Signed-off-by: Stephen Boyd <[email protected]>
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Right now the direction of a DAI has to be specified as a literal
number in the device tree, e.g.:
dai@0 {
reg = <0>;
direction = <2>;
};
but this does not make it immediately clear that this is a
playback/RX-only DAI.
Actually, q6asm-dai.c has useful defines for this. Move them to the
dt-bindings header to allow using them in the dts(i) files.
The example above then becomes:
dai@0 {
reg = <0>;
direction = <Q6ASM_DAI_RX>;
};
which is immediately recognizable as playback/RX-only DAI.
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by: Srinivas Kandagatla <[email protected]>
Cc: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
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The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Also add clock ids for GCC
LPASS and LPASS Core clock IDs for LPASS client to request for the clocks.
Signed-off-by: Taniya Das <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt
Texas Instruments K3 SoC DT updates for v5.9
- Add platforms chipid nodes for am65x and j721e
- Update latest data sheet values for MMC on am65x
- Add serdes and usb3 support for j721e
- Add analog audio support for j721e
- Add SD card support for am65x
- Rename DT nodes for gic-its/smmu to their standard counterparts am65x/j721e
- HTTP links replaced with HTTPS ones
* tag 'ti-k3-dt-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
arm64: dts: k3-j721e-proc-board: Add wait time for sampling Type-C DIR line
arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0
arm64: dts: ti: k3-j721e-main.dtsi: Add USB to SERDES MUX
arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux
arm64: dts: ti: k3-j721e-main: Add WIZ and SERDES PHY nodes
dt-bindings: mfd: ti,j721e-system-controller.yaml: Add J721e system controller
arm64: dts: ti: k3-am65/j721e-main: rename gic-its node to msi-controller
arm64: dts: ti: k3-j721e-main: rename smmu node to iommu
arm64: dts: ti: k3-*: Replace HTTP links with HTTPS ones
arm64: dts: ti: k3-am654-base-board: Add support for SD card
arm64: dts: ti: k3-am65-main: Add support for sdhci1
arm64: dts: ti: j721e-common-proc-board: Analog audio support
arm64: dts: ti: k3-j721e-common-proc-board: Remove duplicated main_i2c1_exp4_pins_default
arm64: dts: ti: k3-am654-main: Update otap-del-sel values
arm64: dts: ti: k3-j721e-mcu-wakeup: add k3 platforms chipid module node
arm64: dts: ti: k3-am65-wakeup: add k3 platforms chipid module node
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM8250 SoCs.
Signed-off-by: Jonathan Marek <[email protected]>
Tested-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM8150 SoCs.
Signed-off-by: Jonathan Marek <[email protected]>
Tested-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Drop the repeated word "the" in a comment.
Cc: Peter Rosin <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Signed-off-by: Randy Dunlap <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring <[email protected]>
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https://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clock event/surce driver changes from Daniel Lezcano:
- Add sama5d2 support and rework the 32kHz clock handling (Alexandre Belloni)
- Add the high resolution support for SMP/SMT on the Ingenic timer (Zhou Yanjie)
- Add support for i.MX TPM driver with ARM64 (Anson Huang)
- Fix typo by replacing KHz to kHz (Geert Uytterhoeven)
- Add 32kHz support by setting the minimum ticks to 5 on Nomadik MTU (Linus Walleij)
- Replace HTTP links with HTTPS ones for security reasons (Alexander A. Klimov)
- Add support for the Ingenic X1000 OST (Zhou Yanjie)
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Add the OST bindings for the X1000 SoC from Ingenic.
Tested-by: 周正 (Zhou Zheng) <[email protected]>
Signed-off-by: 周琰杰 (Zhou Yanjie) <[email protected]>
Reviewed-by: Paul Cercueil <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Daniel Lezcano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add devicetree bindings for Mediatek mt6779 SoC Pin Controller.
Signed-off-by: Mars Cheng <[email protected]>
Signed-off-by: Andy Teng <[email protected]>
Signed-off-by: Hanks Chen <[email protected]>
Acked-by: Sean Wang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
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arm/drivers
Reset controller updates for v5.9
This tag moves the reset-simple header out of drivers/reset for use by
drivers outside of drivers/reset, adds a .reset() callback to
reset-simple, converts i.MX reset bindings to json-schema, fixes a
compile warning in the reset-intel-gw driver, and replaces some HTTP
links with HTTPS ones in comments.
* tag 'reset-for-v5.9' of git://git.pengutronix.de/pza/linux:
reset: Replace HTTP links with HTTPS ones
reset: intel: fix a compile warning about REG_OFFSET redefined
dt-bindings: reset: Convert i.MX7 reset to json-schema
dt-bindings: reset: Convert i.MX reset to json-schema
reset: simple: Add reset callback
reset: Move reset-simple header out of drivers/reset
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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The Sparx5 support 9 different clock outputs. This include file has
defines for each supported clock ordinal.
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Stephen Boyd <[email protected]>
Reviewed-by: Alexandre Belloni <[email protected]>
Signed-off-by: Lars Povlsen <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree update for 5.9:
- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
- Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
- Make tempmon node as child of anatop node according to hardware
architecture.
- The vf610-zii device update: configure fiber port to 1000BaseX, add
switch watchdog, MDIO speed and preamble.
- A series from Fabio Estevam to update imx6qdl-sabresd and
imx6q-tbs2910 for using MDIO node and reset-assert-us.
- Align L2 cache-controller device node name with .yaml schema.
- Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
- A series of patches from Shengjiu Wang to enable various audio
support on i.MX6 devices.
- Add Gateworks System Controller support for imx6qdl-gw devices.
- Change default #pwm-cells setting to <3> in the SoC dtsi files.
- Other small random changes.
* tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (43 commits)
ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog
ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties
ARM: dts: imx6q-tbs2910: Pass reset-assert-us
ARM: dts: imx6q-tbs2910: Add an mdio node
ARM: dts: imx6qdl-sabresd: Pass reset-assert-us
ARM: dts: imx6qdl-sabresd: Add an mdio node
ARM: dts: imx6qdl-gw: add Gateworks System Controller support
ARM: dts: imx6ull: add MYiR MYS-6ULX SBC
ARM: dts: vf610-zii-spb4: Add node for switch watchdog
ARM: dts: colibri-imx6: remove pinctrl-names orphan
ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX
ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX
ARM: dts: ZII: update MDIO speed and preamble
ARM: dts: vfxxx: Add node for CAAM
ARM: dts: imx6qp-sabresd: enable sata
ARM: dts: imx6qp-sabreauto: enable sata
ARM: dts: add Protonic RVT board
ARM: dts: add Protonic VT7 board
ARM: dts: add Protonic WD2 board
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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Immutable branch may be needed in input for a joystick set that is
dependent on it.
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Add device tree binding constants for Actions Semi S500 SoC Reset
Management Unit (RMU).
Signed-off-by: Cristian Ciocaltea <[email protected]>
Acked-by: Philipp Zabel <[email protected]>
Link: https://lore.kernel.org/r/daf615160b3be9f38dcf7926cc82128c9c2d73e3.1593788312.git.cristian.ciocaltea@gmail.com
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Add the missing APB, DMAC and GPIO clock bindings constants for
Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea <[email protected]>
Link: https://lore.kernel.org/r/67112af4f5bc0cc5e70ce8410feb369cc72972b8.1593788312.git.cristian.ciocaltea@gmail.com
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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* clk-imx:
clk: imx: vf610: add CAAM clock
clk: imx8mp: add mu root clk
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* clk-amlogic:
clk: meson: meson8b: add the vclk2_en gate clock
clk: meson: meson8b: add the vclk_en gate clock
clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
clk: meson: g12a: Add support for NNA CLK source clocks
dt-bindings: clk: g12a-clkc: Add NNA CLK Source clock IDs
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* clk-renesas:
clk: renesas: cpg-mssr: Add r8a774e1 support
dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1
clk: renesas: Add r8a774e1 CPG Core Clock Definitions
dt-bindings: power: Add r8a774e1 SYSC power domain definitions
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* clk-qcom:
clk: qcom: gcc: Make disp gpll0 branch aon for sc7180/sdm845
ipq806x: gcc: add support for child probe
clk: qcom: msm8996: Make symbol 'cpu_msm8996_clks' static
clk: qcom: ipq8074: Add correct index for PCIe clocks
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The PCIe clocks GCC_PCIE0_AXI_S_BRIDGE_CLK, GCC_PCIE0_RCHNG_CLK_SRC,
GCC_PCIE0_RCHNG_CLK are wrongly added to the gcc reset group.
Move them to the gcc clock group.
Reported-by: kernel test robot <[email protected]>
Signed-off-by: Sivaprakash Murugesan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Fixes: e7fb524cfcca ("dt-bindings: clock: qcom: ipq8074: Add missing bindings for PCIe")
Signed-off-by: Stephen Boyd <[email protected]>
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Introduce support for touchscreen channels found in JZ47xx SoCs.
Signed-off-by: Artur Rojek <[email protected]>
Tested-by: Paul Cercueil <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Jonathan Cameron <[email protected]>
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Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
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The system controller node manages the CTRL_MMR0 region.
Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <[email protected]>
Signed-off-by: Tero Kristo <[email protected]>
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The ZynqMP includes the DisplayPort subsystem with its own DMA engine
called DPDMA. The DPDMA IP comes with 6 individual channels
(4 for display, 2 for audio). This documentation describes DT bindings
of DPDMA.
Signed-off-by: Hyun Kwon <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
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Add DT bindings for the LEDs multicolor class framework.
Add multicolor ID to the color ID list for device tree bindings.
CC: Rob Herring <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Acked-by: Jacek Anaszewski <[email protected]>
Signed-off-by: Dan Murphy <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
Signed-off-by: Pavel Machek <[email protected]>
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Add all RZ/G2H Clock Pulse Generator Core Clock Outputs, as listed in
Table 11.2 ("List of Clocks [RZ/G2H]") of the RZ/G2H Hardware User's
Manual.
Signed-off-by: Marian-Cristian Rotariu <[email protected]>
Signed-off-by: Lad Prabhakar <[email protected]>
Link: https://lore.kernel.org/r/1594138692-16816-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <[email protected]>
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This patch adds power domain indices for the RZ/G2H (r8a774e1) SoC.
Signed-off-by: Marian-Cristian Rotariu <[email protected]>
Signed-off-by: Lad Prabhakar <[email protected]>
Link: https://lore.kernel.org/r/1594138692-16816-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <[email protected]>
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* clk-qcom:
clk: qcom: smd: Add support for MSM8992/4 rpm clocks
clk: qcom: ipq8074: Add missing clocks for pcie
dt-bindings: clock: qcom: ipq8074: Add missing bindings for PCIe
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Add rpm smd clocks, PMIC and bus clocks which are required on MSM8992,
MSM8994 (and APQ variants) for clients to vote on.
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[[email protected]: Fixed up binding numbers]
Signed-off-by: Stephen Boyd <[email protected]>
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Add missing clock bindings for PCIe port0 of ipq8074.
Co-developed-by: Selvam Sathappan Periakaruppan <[email protected]>
Signed-off-by: Selvam Sathappan Periakaruppan <[email protected]>
Signed-off-by: Sivaprakash Murugesan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[[email protected]: Clean up commit text subject]
Signed-off-by: Stephen Boyd <[email protected]>
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This patch adds description for MT6779 IOMMU.
MT6779 has two iommus, they are mm_iommu and apu_iommu which
both use ARM Short-Descriptor translation format.
In addition, mm_iommu and apu_iommu are two independent HW instance
, we need to set them separately.
The MT6779 IOMMU hardware diagram is as below, it is only a brief
diagram about iommu, it don't focus on the part of smi_larb, so
I don't describe the smi_larb detailedly.
EMI
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--------------------------------------
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MM_IOMMU APU_IOMMU
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SMI_COMMOM----------- APU_BUS
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SMI_LARB(0~11) | |
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Multimedia engine CCU VPU MDLA EMDA
All the connections are hardware fixed, software can not adjust it.
Signed-off-by: Chao Hao <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joerg Roedel <[email protected]>
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Increase #pinctrl-cells to 2 so that mux and conf be kept separate. This
requires the AM33XX_PADCONF macro in omap.h to also be modified to keep pin
conf and pin mux values separate.
Signed-off-by: Drew Fustini <[email protected]>
Acked-by: Tony Lindgren <[email protected]>
Acked-by: Haojian Zhuang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Linus Walleij <[email protected]>
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function" from Anand K Mistry <[email protected]>:
This patchset adds support for being able to change regulator modes for
the mt6397 regulator. This is needed to allow the voltage scaling
support in the MT8173 SoC to be used on the elm (Acer Chromebook R13)
and hana (several Lenovo Chromebooks) devices.
Without a of_map_mode implementation, the regulator-allowed-modes
devicetree field is skipped, and attempting to change the regulator mode
results in an error:
[ 1.439165] vpca15: mode operation not allowed
Changes in v2:
- Introduce constants in dt-bindings
- Improve conditional readability
Anand K Mistry (4):
regulator: mt6397: Move buck modes into header file
dt-bindings: regulator: mt6397: Document valid modes
regulator: mt6397: Implement of_map_mode
arm64: dts: mediatek: Update allowed mt6397 regulator modes for elm
boards
.../bindings/regulator/mt6397-regulator.txt | 3 +++
arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 4 +++-
drivers/regulator/mt6397-regulator.c | 17 ++++++++++++++---
.../regulator/mediatek,mt6397-regulator.h | 15 +++++++++++++++
4 files changed, 35 insertions(+), 4 deletions(-)
create mode 100644 include/dt-bindings/regulator/mediatek,mt6397-regulator.h
--
2.27.0.212.ge8ba1cc988-goog
_______________________________________________
linux-arm-kernel mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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This will allow device trees to make use of these constants.
Signed-off-by: Anand K Mistry <[email protected]>
Link: https://lore.kernel.org/r/20200702131350.1.I96e67ab7b4568287eb939e8a572cbc03e87f1aa0@changeid
Signed-off-by: Mark Brown <[email protected]>
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This will allow device trees to make use of these constants.
Signed-off-by: Anand K Mistry <[email protected]>
Link: https://lore.kernel.org/r/20200702162231.v2.1.Icf69e2041b1af4548347018186c3ba6310f53e66@changeid
Signed-off-by: Mark Brown <[email protected]>
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Add DT bindings for the Xilinx ZynqMP PHY. ZynqMP SoCs have a High Speed
Processing System Gigabit Transceiver which provides PHY capabilities to
USB, SATA, PCIE, Display Port and Ehernet SGMII controllers.
Signed-off-by: Anurag Kumar Vulisha <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
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- Make defines for bcm63xx-gate clks to use in DT
- Support gate clks on BCM6318 SoCs
- Add HDMI clks for BCM2711 SoCs
- Support BCM2711 SoC firmware clks
* clk-bcm: (42 commits)
clk: bcm: dvp: Add missing module informations
clk: bcm: rpi: Remove the quirks for the CPU clock
clk: bcm2835: Don't cache the PLLB rate
clk: bcm2835: Allow custom CCF flags for the PLLs
Revert "clk: bcm2835: remove pllb"
clk: bcm: rpi: Give firmware clocks a name
clk: bcm: rpi: Discover the firmware clocks
clk: bcm: rpi: Add an enum for the firmware clocks
clk: bcm: rpi: Add DT provider for the clocks
clk: bcm: rpi: Make the PLLB registration function return a clk_hw
clk: bcm: rpi: Split pllb clock hooks
clk: bcm: rpi: Rename is_prepared function
clk: bcm: rpi: Pass the clocks data to the firmware function
clk: bcm: rpi: Add clock id to data
clk: bcm: rpi: Create a data structure for the clocks
clk: bcm: rpi: Use CCF boundaries instead of rolling our own
clk: bcm: rpi: Make sure the clkdev lookup is removed
clk: bcm: rpi: Switch to clk_hw_register_clkdev
clk: bcm: rpi: Remove pllb_arm_lookup global pointer
clk: bcm: rpi: Make sure pllb_arm is removed
...
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* clk-vc5:
clk: vc5: Enable addition output configurations of the Versaclock
dt: Add additional option bindings for IDT VersaClock
clk: vc5: Allow Versaclock driver to support multiple instances
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According to Vybrid Security RM, CCM_CCGR11[CG176] can be used to gate
CAAM ipg clock.
Signed-off-by: Horia Geantă <[email protected]>
Signed-off-by: Andrey Smirnov <[email protected]>
Cc: Chris Healy <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Tested-by: Chris Healy <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The VersaClock driver now supports some additional bindings to support
child nodes which can configure optional settings like mode, voltage
and slew.
This patch updates the binding document to describe what is available
in the driver.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
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- Enable CPU clks on Qualcomm IPQ6018 SoCs
* clk-qcom:
clk: qcom: smd: Add support for MSM8936 rpm clocks
dt-bindings: clock: rpmcc: Document MSM8936 compatible
clk: qcom: smd: Add support for SDM660 rpm clocks
clk: qcom: Add ipq6018 apss clock controller
clk: qcom: Add DT bindings for ipq6018 apss clock controller
clk: qcom: Add ipq apss pll driver
dt-bindings: clock: add ipq6018 a53 pll compatible
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Add missing definition of rpm clk for msm8936 soc (also used by msm8939)
Signed-off-by: Vincent Knecht <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
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Add rpm smd clocks, PMIC and bus clocks which are required on
SDM630/660 (and APQ variants) for clients to vote on.
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
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