| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2020-09-18 | dt-bindings: phy: Add PHY_TYPE_QSGMII definition | Swapnil Jakhade | 1 | -0/+1 | |
| Add definition for QSGMII phy type. Signed-off-by: Swapnil Jakhade <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]> | |||||
| 2020-06-29 | dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY | Anurag Kumar Vulisha | 1 | -0/+1 | |
| Add DT bindings for the Xilinx ZynqMP PHY. ZynqMP SoCs have a High Speed Processing System Gigabit Transceiver which provides PHY capabilities to USB, SATA, PCIE, Display Port and Ehernet SGMII controllers. Signed-off-by: Anurag Kumar Vulisha <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]> | |||||
| 2020-05-19 | dt-bindings: phy: Add PHY_TYPE_XPCS definition | Dilip Kota | 1 | -0/+1 | |
| Add definition for Ethernet PCS phy type. Signed-off-by: Dilip Kota <[email protected]> Acked-by: Rob Herring <[email protected]> Acked-By: Vinod Koul <[email protected]> Link: https://lore.kernel.org/r/6091f0d2a1046f1e3656d9e33b6cc433d5465eaf.1589868358.git.eswara.kota@linux.intel.com Signed-off-by: Kishon Vijay Abraham I <[email protected]> | |||||
| 2020-01-17 | dt-bindings: phy: Add PHY_TYPE_DP definition | Jyri Sarha | 1 | -0/+1 | |
| Add definition for DisplayPort phy type. Signed-off-by: Jyri Sarha <[email protected]> Reviewed-by: Roger Quadros <[email protected]> Reviewed-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]> | |||||
| 2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194 | Thomas Gleixner | 1 | -1/+1 | |
| Based on 1 normalized pattern(s): license terms gnu general public license gpl version 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Allison Randal <[email protected]> Reviewed-by: Alexios Zavras <[email protected]> Reviewed-by: Steve Winslow <[email protected]> Reviewed-by: Richard Fontana <[email protected]> Cc: [email protected] Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]> | |||||
| 2017-10-23 | dt-bindings: phy: Add PHY_TYPE_UFS definition | Vivek Gautam | 1 | -0/+1 | |
| Add definition for UFS phy type. Signed-off-by: Vivek Gautam <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]> | |||||
| 2014-11-26 | phy: add support for USB cluster on the Armada 375 SoC | Gregory CLEMENT | 1 | -0/+1 | |
| The Armada 375 SoC comes with an USB2 host and device controller and an USB3 controller. The USB cluster control register allows to manage common features of both USB controllers. This commit adds a driver integrated in the generic PHY framework to control this USB cluster feature. Signed-off-by: Gregory CLEMENT <[email protected]> Signed-off-by: Thomas Petazzoni <[email protected]> [ [email protected] : Made it to use the updated devm_phy_create API and soem cosmentic changes in Kconfig file.] Signed-off-by: Kishon Vijay Abraham I <[email protected]> Acked-by: Jason Cooper <[email protected]> | |||||
| 2014-11-11 | phy: Add PHY header file for DT x Driver defines | Gabriel FERNANDEZ | 1 | -0/+18 | |
| This provides the shared header file which will be reference from both PHY driver and its associated Device Tree node(s). Signed-off-by: Gabriel Fernandez <[email protected]> | |||||