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The root clock slice at 0xbf00 is media_ldb clock,
not csi_phy2_ref, so correct it.
Signed-off-by: Jacky Bai <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Use imx8m_clk_hw_composite_core to simpliy clks that belong to
core clk slice.
Reviewed-by: Leonard Crestez <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Dong Aisheng <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Inspried from
commit e8688fe8df7d ("clk: imx8mn: Define gates for pll1/2 fixed dividers")
On imx8mp there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2
each with their own gate. Only one of these gates (the one "dividing" by
one) is currently defined and it's incorrectly set as the parent of all
the fixed-factor dividers.
Add the other 8 gates to the clock tree between sys_pll1/2_bypass and
the fixed dividers.
Reviewed-by: Dong Aisheng <[email protected]>
Reviewed-by: Leonard Crestez <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add all the clock ids for the audiomix clocks.
Signed-off-by: Abel Vesa <[email protected]>
Acked-by: Rob Herring <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The A53 CCM clk root only accepts input up to 1GHz, CCM A53 root
signoff timing is 1Ghz, however the A53 core which sources from CCM
root could run above 1GHz which voilates the CCM.
There is a CORE_SEL slice before A53 core, we need configure the
CORE_SEL slice source from ARM PLL, not A53 CCM clk root.
The A53 CCM clk root should only be used when need to change ARM PLL
frequency.
Add arm_a53_core clk that could source from arm_a53_div and arm_pll_out.
Configure a53 ccm root sources from 800MHz sys pll
Configure a53 core sources from arm_pll_out
Mark arm_a53_core as critical clk
Reviewed-by: Jacky Bai <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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On i.MX8MP, internal HDMI 27M clock is actually 24MHz, so rename
the IMX8MP_CLK_HDMI_27M to IMX8MP_CLK_HDMI_24M.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add the clock binding doc for i.MX8MP.
Signed-off-by: Anson Huang <[email protected]>
Reviewed-by: Abel Vesa <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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