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The PXP has a single CCGR clock gate, gating both the IPG_CLK_ROOT and
the MAIN_AXI_CLK_ROOT. Add a single clock to cover both.
Signed-off-by: Laurent Pinchart <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Enrico Weigelt <[email protected]>
Reviewed-by: Kate Stewart <[email protected]>
Reviewed-by: Allison Randal <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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Correct enet clock gates as below:
CCGR6: IMX7D_ENET_AXI_ROOT_CLK (enet1 and enet2 bus clocks)
CCGR112: IMX7D_ENET1_TIME_ROOT_CLK, IMX7D_ENET1_IPG_ROOT_CLK
CCGR113: IMX7D_ENET2_TIME_ROOT_CLK, IMX7D_ENET2_IPG_ROOT_CLK
Just rename unused IMX7D_ENETx_REF_ROOT_CLK for
IMX7D_ENETx_IPG_ROOT_CLK instead of adding new clocks.
Based on Andy Duan's patch from the NXP kernel tree.
Signed-off-by: Anson Huang <[email protected]>
Acked-by: Rob Herring <[email protected]>
Reviewed-by: Stefan Agner <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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According to the i.MX7D Reference Manual, the Keypad Port module
(KPP) requires this clock gate to be enabled.
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add CAAM clock so that we could use the Cryptographic Acceleration and
Assurance Module (CAAM) hardware block.
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: [email protected]
Cc: "Horia Geantă" <[email protected]>
Cc: Aymen Sghaier <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: "David S. Miller" <[email protected]>
Cc: Lukas Auer <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Rui Miguel Silva <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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According to the i.MX7D Reference Manual,
SNVS block has a clock gate, accessing SNVS block
would need this clock gate to be enabled, add it
into clock tree so that SNVS module driver can
operate this clock gate.
Signed-off-by: Anson Huang <[email protected]>
Acked-by: Dong Aisheng <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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IMX7d does not have an M0 Core and this particular
clock doesn't seem connected to anything else.
Remove this entry from the CCM driver.
Signed-off-by: Adriana Reus <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
and NAND_CLK_ROOT. However, the gate has been in the chain of the
latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
only, e.g. as required by APBH-Bridge-DMA.
Add new clocks which represent the clock after the gate, and use a
shared clock gate to correctly model the hardware.
Signed-off-by: Stefan Agner <[email protected]>
Tested-by: Fabio Estevam <[email protected]>
Acked-by: Han Xu <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Add the OCOTP so that this hardware block can be used.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Add the necessary clock to use the ckil on i.MX7.
Inspired from the following patch:
https://github.com/boundarydevices/linux-imx6/commit/b80e8271
Signed-off-by: Troy Kisky <[email protected]>
Signed-off-by: Gary Bisson <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add a virtual arm clk to abstract the actual steps
when changing the ARM core frequency.So we can using
the 'cpufreq-dt' driver on i.MX7D/Solo.
Signed-off-by: Bai Ping <[email protected]>
Acked-by: Lucas Stach <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add ADC root clock support in imx7d clock tree.
Signed-off-by: Haibo Chen <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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It adds the imx7d clock ID definitions which will be used by both imx7d
clock driver and device tree.
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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